mirror of
https://github.com/switchbrew/libnx.git
synced 2025-07-05 10:52:15 +02:00
353 lines
10 KiB
C
353 lines
10 KiB
C
#include <switch.h>
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#include <string.h>
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Result vnInit3D(Vn* vn) {
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Result rc;
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vnAddCmd(
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vn,
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// ???
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NvIncr(0, NvReg3D_MmeShadowScratch(0x1A), 0, 0xffffffff),
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NvImm(0, NvReg3D_MmeShadowScratch(0x19), 0),
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//
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NvImm(0, NvReg3D_MultisampleEnable, 0),
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NvImm(0, NvReg3D_MultisampleCsaaEnable, 0),
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NvImm(0, NvReg3D_MultisampleMode, 0),
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NvImm(0, NvReg3D_MultisampleControl, 0),
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// ???
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NvImm(0, 0x433, 4),
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NvImm(0, 0x438, 0xff),
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NvImm(0, 0x439, 0xff),
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NvImm(0, 0x43b, 0xff),
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NvImm(0, 0x43c, 4),
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NvImm(0, 0x1d3, 0x3f),
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//
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NvIncr(0, NvReg3D_WindowNHorizontal, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0),
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NvImm(0, NvReg3D_ClearFlags, 0x101)
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);
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size_t i;
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for (i=0; i<16; i++) {
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vnAddCmd(vn, NvImm(0, NvReg3D_ScissorEnable(i), 1));
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}
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vnAddCmd(
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vn,
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NvImm(0, NvReg3D_PrimRestartWithDrawArrays, 1),
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NvImm(0, NvReg3D_PointRasterRules, 0),
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NvImm(0, NvReg3D_LinkedTsc, 0),
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NvImm(0, NvReg3D_ProvokingVertexLast, 1),
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// ???
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NvImm(0, 0x54a, 0),
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NvImm(0, 0x400, 0x10),
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NvImm(0, 0x86, 0x10),
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NvImm(0, 0x43f, 0x10),
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NvImm(0, 0x4a4, 0x10),
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NvImm(0, 0x4b6, 0x10),
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NvImm(0, 0x4b7, 0x10),
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//
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NvImm(0, NvReg3D_CallLimitLog, 8),
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// ???
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NvImm(0, 0x450, 0x10),
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NvImm(0, 0x584, 0xe)
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);
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for (i=0; i<16; i++) {
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vnAddCmd(vn, NvImm(0, NvReg3D_VertexStreamEnableDivisor(i), 0));
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}
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vnAddCmd(
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vn,
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NvImm(0, NvReg3D_VertexIdGenMode, 0),
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NvImm(0, NvReg3D_ZcullStatCtrsEnable, 1),
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NvImm(0, NvReg3D_LineWidthSeparate, 1),
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// ???
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NvImm(0, 0xc3, 0),
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NvImm(0, 0xc0, 3),
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NvImm(0, 0x3f7, 1),
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NvImm(0, 0x670, 1),
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NvImm(0, 0x3e3, 0),
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NvImm(0, NvReg3D_StencilTwoSideEnable, 1),
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NvImm(0, NvReg3D_TextureConstantBufferIndex, 2),
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NvImm(0, 0xc4, 0x503),
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NvIncr(0, NvReg3D_LocalBase, 0x01000000),
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NvImm(0, 0x44c, 0x13),
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NvImm(0, 0xdd, 0),
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NvIncr(0, NvReg3D_Layer, 0x10000),
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NvImm(0, 0x488, 5),
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NvIncr(0, 0x514, 0x00800008),
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);
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// Initializes some 2D things..
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vnAddCmd(
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vn,
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NvImm(3, 0xab, 3), // SetOperation?
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NvImm(3, 0xa4, 0), // SetClipEnable
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NvImm(3, 0x221, 0x3f)
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);
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// TODO: Call macro_14f(0x00418800, 1, 1).
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// TODO: Call macro_14f(0x00419a08, 0, 0x10).
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// TODO: Call macro_14f(0x00419f78, 0, 8).
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// TODO: Call macro_14f(0x00404468, 0x07ffffff, 0x3fffffff).
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// TODO: Call macro_14f(0x00419a04, 1, 1).
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// TODO: Call macro_14f(0x00419a04, 2, 2).
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vnAddCmd(
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vn,
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// Reset Zcull.
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NvImm(0, 0x65a, 0x11),
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NvImm(0, NvReg3D_ZcullTestMask, 0),
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NvImm(0, NvReg3D_ZcullRegion, 0),
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NvIncr(0, 0x054, 0x49000000, 0x49000001),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x18), 0x05000500)
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);
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// TODO: Call macro_21d(5, 0x00050000, 0x67);
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// TODO: Of what size is this buffer actually supposed to be?
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rc = nvBufferCreateRw(
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&vn->vertex_runout, 0x10000, 0x1000, 0, &vn->parent->addr_space);
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if (R_FAILED(rc))
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return rc;
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iova_t gpu_addr = nvBufferGetGpuAddr(&vn->vertex_runout);
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vnAddCmd(vn, NvIncr(0, NvReg3D_VertexRunoutAddr, gpu_addr >> 32, gpu_addr));
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// TODO: Call macro_206(0x194);
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// TODO: Write an addr(?) to low->0x8e4,high->0x8e5
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// TODO: Write 0 to 0x8e6, 0x8e7.
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// TODO: Call macro_226(5, 0x00056900, 0x100)
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// TODO: Call macro_226(5, 0x00056A00, 0x800)
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// Bind all const buffers index 0 to same buffer (of size 0x5f00).
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rc = nvBufferCreateRw(
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&vn->const_buffer0, 0x5f00 + 5*0x200, 0x1000, 0, &vn->parent->addr_space);
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if (R_FAILED(rc))
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return rc;
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gpu_addr = nvBufferGetGpuAddr(&vn->const_buffer0);
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vnAddCmd(
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vn,
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NvIncr(
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0, NvReg3D_ConstantBufferSize,
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0x5f00,
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gpu_addr >> 32, gpu_addr
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)
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);
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gpu_addr += 0x5f00;
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for (i=0; i<5; i++) {
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vnAddCmd(vn, NvImm(0, NvReg3D_ConstantBufferBind(i), 1));
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}
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// Bind const buffer index 2 to differnet buffers (each of size 0x200).
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for (i=0; i<5; i++) {
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vnAddCmd(
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vn,
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NvIncr(0,
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NvReg3D_ConstantBufferSize,
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0x5f00, // Size
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gpu_addr >> 32, gpu_addr // Addr
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),
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NvImm(0, NvReg3D_ConstantBufferBind(i), 0x21),
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NvIncrOnce(
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0, NvReg3D_ConstantBufferLoadOffset, 0,
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0,1,2,3,4,5,6,7
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)
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);
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gpu_addr += 0x200;
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}
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vnAddCmd(
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vn,
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NvImm(0, NvReg3D_BlendIndependent, 1),
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NvImm(0, NvReg3D_EdgeFlag, 1),
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NvImm(0, NvReg3D_ViewportTransformEnable, 1),
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NvIncr(0, NvReg3D_ViewportControl, 0x181d) // ???
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);
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// NO issue.
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// Reset all the viewports.
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for (i=0; i<16; i++) {
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vnAddCmd(
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vn,
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NvIncr(0, NvReg3D_ViewportScaleX(i),
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f2i(0.5), /* ScaleX */
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f2i(0.5), /* ScaleY */
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f2i(0.5), /* ScaleZ */
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f2i(0.5), /* TranslateX */
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f2i(0.5), /* TranslateY */
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f2i(0.5) /* TranslateZ */
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),
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NvIncr(0, NvReg3D_ViewportHorizontal(i),
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0 | (1<<16), /* Horizontal */
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0 | (1<<16) /* Vertical */
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)
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);
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}
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//vnAddCmd(vn, NvImm(0, NvReg3D_ScreenHorizontalControl, 0x10)); // FAULTY
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// Reset all the scissors.
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for (i=0; i<16; i++) {
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vnAddCmd(
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vn,
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NvIncr(0, NvReg3D_ScissorHorizontal(i),
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(0xffff << 16) | 0, /* Horizontal */
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(0xffff << 16) | 0 /* Vertical */
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)
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);
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}
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// Setup RAM for macros.
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vnAddCmd(
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vn,
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NvImm(0, NvReg3D_MmeShadowRamControl, 1),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x1c),
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0xffffffff)
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);
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// Reset IndexArrayLimit.
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vnAddCmd(
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vn,
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NvIncr(0, NvReg3D_IndexArrayLimit, 0xFF, 0xFFFFFFFF),
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NvImm(0, NvReg3D_PrimRestartWithDrawArrays, 0)
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);
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// More RAM setup.
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vnAddCmd(
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vn,
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2a), 0x0500055f),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2b), 0x05000561),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2c), 0x05000563),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2d), 0x05000565),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2e), 0x05000567),
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NvImm(0, NvReg3D_MmeShadowScratch(0x2f), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x30), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x31), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x32), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x33), 0x200)
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);
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vnAddCmd(
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vn,
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NvIncr(0, NvReg3D_SampleCountEnable, 1),
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NvIncr(0, NvReg3D_ClipDistanceEnable, 0xff),
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NvIncr(0, NvReg3D_MsaaMask, 0xffff, 0xffff, 0xffff, 0xffff),
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NvImm(0, 0x367, 0),
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NvImm(0, NvReg3D_PointSpriteEnable, 1),
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NvImm(0, NvReg3D_PointCoordReplace, 4),
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NvImm(0, NvReg3D_VpPointSize, 1),
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NvImm(0, 0x68b, 0),
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NvImm(0, NvReg3D_StencilTwoSideEnable, 1)
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);
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// NvImm(0, 0xe2a, 0x184)); // MACRO CALL NOT IMPLEMENTED
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// TODO: Call macro_206(0x184);
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//vnAddCmd(vn, NvIncr(0, NvReg3D_ConstantBufferLoadN, 0x44fffe00));
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vnAddCmd(
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vn,
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NvImm(0, NvReg3D_ZetaArrayMode, 1),
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NvImm(0, NvReg3D_ConservativeRaster, 0),
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);
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// TODO: Call macro_14f(0x00418800, 0, 0x01800000);
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vnAddCmd(
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vn,
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NvImm(0, NvReg3D_MmeShadowScratch(0x34), 0),
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NvImm(0, 0xbb, 0),
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NvImm(0, NvReg3D_MultisampleRasterEnable, 0),
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NvImm(0, NvReg3D_CoverageModulationEnable, 0),
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NvImm(0, 0x44c, 0x13), // not in fermi ?
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NvImm(0, NvReg3D_MultisampleCoverageToColor, 0)
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);
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//vnAddCmd(vn, NvIncr(0, NvReg3D_CodeAddr, 4, 0x00000000));
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vnAddCmd(
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vn,
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NvImm(0, NvReg3D_MmeShadowScratch(0x27), 0x230),
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NvImm(0, NvReg3D_MmeShadowScratch(0x23), 0x430),
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NvImm(0, 0x5ad, 0)
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);
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// TODO: Call macro_14f(0x00418e40, 7, 0xf);
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// TODO: Call macro_14f(0x00418e58, 0x842, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x70, 0xf0);
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// TODO: Call macro_14f(0x00418e58, 0x04f10000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e40, 0x700, 0xf00);
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// TODO: Call macro_14f(0x00418e5c, 0x53, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x7000, 0xf000);
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// TODO: Call macro_14f(0x00418e5c, 0xe90000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e40, 0x70000, 0xf0000);
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// TODO: Call macro_14f(0x00418e60, 0xea, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x700000, 0xf00000);
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// TODO: Call macro_14f(0x00418e60, 0x00eb0000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e40, 0x07000000, 0x0f000000);
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// TODO: Call macro_14f(0x00418e64, 0x208, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x70000000, 0xf0000000);
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// TODO: Call macro_14f(0x00418e64, 0x02090000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e44, 7, 0xf);
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// TODO: Call macro_14f(0x00418e68, 0x20a, 0xffff);
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// TODO: Call macro_14f(0x00418e44, 0x70, 0xf0);
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// TODO: Call macro_14f(0x00418e68, 0x020b0000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e44, 0x700, 0xf00);
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// TODO: Call macro_14f(0x00418e6c, 0x644, 0xffff);
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// Setting up TiledCache and other stuff.
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vnAddCmd(
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vn,
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NvImm(0, 0x3d8, 0),
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NvIncr(0, 0x3d9, 0x00800080),
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NvIncr(0, 0x3da, 0x1109),
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NvIncr(0, 0x3db, 0x08080202),
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NvImm(0, 0x442, 0x1f),
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NvIncr(0, 0x3dc, 0x00080001),
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NvImm(0, 0x44d, 0),
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);
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// TODO: Subchannel 1:
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/*
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NvImm(0, 0x54a, 0),
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NvImm(0, 0x982, 2),
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NvIncr(0, NvReg3D_LocalBase, 0x01000000),
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NvIncr(0, 0x85, 0x03000000),
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NvIncr(0, NvReg3D_CodeAddr, 4, 0x00000000),
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NvImm(0xc4, 0x503),
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*/
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// TODO: Subchannel 6:
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/*
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2001c00b type: 1, subchannel: 6
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UNKNOWN (0x00b) <- 0x80000000
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2001c00b type: 1, subchannel: 6
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UNKNOWN (0x00b) <- 0x70000000
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*/
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// Flush texture info cache.
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vnAddCmd(
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vn,
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NvImm(0, 0x4a2, 0),
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NvImm(0, 0x369, 0x11),
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NvImm(0, 0x50a, 0),
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NvImm(0, 0x509, 0)
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);
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vnAddCmd(
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vn,
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NvIncr(0, 0x1e9, 0x7ff8),
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NvIncr(0, 0x1ea, 0x7ffc)
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);
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return 0;
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}
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