mika/libnx
1
0
Fork 0
mirror of https://github.com/switchbrew/libnx.git synced 2025-06-22 13:02:38 +02:00
Code Issues Packages Projects Releases Wiki Activity

Zcull context works

Browse Source
This commit is contained in:
plutooo 2018-03-10 20:39:34 +01:00 committed by fincs
parent 420d445a84
commit d6f2e1118c
5 changed files with 18 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
nx/include/switch/nvidia/gpu/gpu.h
View File

@ -5,6 +5,7 @@ typedef struct NvGpu {
NvChannel gpu_channel; NvChannel gpu_channel;
NvGpfifo gpfifo; NvGpfifo gpfifo;
NvZcullContext zcull_ctx; NvZcullContext zcull_ctx;
Nv3dContext _3d_ctx;
} NvGpu; } NvGpu;
Result nvgpuCreate(NvGpu* g); Result nvgpuCreate(NvGpu* g);

3
nx/source/nvidia/address_space.c
View File

@ -44,7 +44,8 @@ Result nvasReserveFull(NvAddressSpace* a) {
} }
Result nvasMapBuffer(NvAddressSpace* a, NvBuffer* buffer, NvBufferKind kind, iova_t* iova_out) { Result nvasMapBuffer(NvAddressSpace* a, NvBuffer* buffer, NvBufferKind kind, iova_t* iova_out) {
return nvioctlNvhostAsGpu_MapBufferEx(a->fd, 0, kind, buffer->fd, 0, 0, buffer->size, 0, iova_out); // TODO: What is flag==4?
return nvioctlNvhostAsGpu_MapBufferEx(a->fd, 4, kind, buffer->fd, 0x10000, 0, 0, 0, iova_out);
} }
Result nvasBindToChannel(NvAddressSpace* a, NvChannel* channel) { Result nvasBindToChannel(NvAddressSpace* a, NvChannel* channel) {

2
nx/source/nvidia/buffer.c
View File

@ -43,6 +43,8 @@ static Result _nvbufCreate(NvBuffer* m, size_t size, u32 flags, u32 align, NvBuf
{ {
Result rc; Result rc;
size = (size + 0xFFF) &~ 0xFFF;
m->has_init = true; m->has_init = true;
m->size = size; m->size = size;
m->fd = -1; m->fd = -1;

8
nx/source/nvidia/gpu/gpu.c
View File

@ -27,6 +27,12 @@ Result nvgpuCreate(NvGpu* g)
if (R_SUCCEEDED(rc)) if (R_SUCCEEDED(rc))
rc = nvfifoCreate(&g->gpfifo, &g->gpu_channel); rc = nvfifoCreate(&g->gpfifo, &g->gpu_channel);
if (R_SUCCEEDED(rc))
rc = nv3dCreate(&g->_3d_ctx, g);
if (R_SUCCEEDED(rc))
rc = nvchannelSetPriority(&g->gpu_channel, NvChannelPriority_Medium);
if (R_SUCCEEDED(rc)) if (R_SUCCEEDED(rc))
rc = nvzcullCreate(&g->zcull_ctx, g); rc = nvzcullCreate(&g->zcull_ctx, g);
@ -41,6 +47,8 @@ void nvgpuClose(NvGpu* g)
nvbufExit(); nvbufExit();
nvinfoExit(); nvinfoExit();
nvzcullClose(&g->zcull_ctx);
nv3dClose(&g->_3d_ctx);
nvfifoClose(&g->gpfifo); nvfifoClose(&g->gpfifo);
nvasClose(&g->addr_space); nvasClose(&g->addr_space);
nvchannelClose(&g->gpu_channel); nvchannelClose(&g->gpu_channel);

6
nx/source/nvidia/gpu/zcull_ctx.c
View File

@ -5,13 +5,17 @@ Result nvzcullCreate(NvZcullContext* z, NvGpu* parent)
Result rc; Result rc;
z->parent = parent; z->parent = parent;
rc = nvbufCreateRw(&z->ctx_buf, nvinfoGetZcullCtxSize(), 0x1000, NvBufferKind_Pitch); rc = nvbufCreateRw(&z->ctx_buf, nvinfoGetZcullCtxSize(), 0x20000, NvBufferKind_Pitch);
iova_t iova_out; iova_t iova_out;
if (R_SUCCEEDED(rc)) if (R_SUCCEEDED(rc))
rc = nvasMapBuffer(&parent->addr_space, &z->ctx_buf, NvBufferKind_Pitch, &iova_out); rc = nvasMapBuffer(&parent->addr_space, &z->ctx_buf, NvBufferKind_Pitch, &iova_out);
if (R_SUCCEEDED(rc))
rc = nvasMapBuffer(&parent->addr_space, &z->ctx_buf, NvBufferKind_Generic_16BX2, /*&iova_out*/ NULL);
if (R_SUCCEEDED(rc)) if (R_SUCCEEDED(rc))
rc = nvioctlChannel_ZCullBind(parent->gpu_channel.fd, iova_out, NvZcullConfig_SeparateBuffer); rc = nvioctlChannel_ZCullBind(parent->gpu_channel.fd, iova_out, NvZcullConfig_SeparateBuffer);