diff --git a/nx/include/switch/nvidia/gpu/gpu.h b/nx/include/switch/nvidia/gpu/gpu.h
index 79357899..08b399df 100644
--- a/nx/include/switch/nvidia/gpu/gpu.h
+++ b/nx/include/switch/nvidia/gpu/gpu.h
@@ -5,6 +5,7 @@ typedef struct NvGpu {
     NvChannel gpu_channel;
     NvGpfifo gpfifo;
     NvZcullContext zcull_ctx;
+    Nv3dContext _3d_ctx;
 } NvGpu;
 
 Result nvgpuCreate(NvGpu* g);
diff --git a/nx/source/nvidia/address_space.c b/nx/source/nvidia/address_space.c
index 74978cc3..c9ab518f 100644
--- a/nx/source/nvidia/address_space.c
+++ b/nx/source/nvidia/address_space.c
@@ -44,7 +44,8 @@ Result nvasReserveFull(NvAddressSpace* a) {
 }
 
 Result nvasMapBuffer(NvAddressSpace* a, NvBuffer* buffer, NvBufferKind kind, iova_t* iova_out) {
-    return nvioctlNvhostAsGpu_MapBufferEx(a->fd, 0, kind, buffer->fd, 0, 0, buffer->size, 0, iova_out);
+    // TODO: What is flag==4?
+    return nvioctlNvhostAsGpu_MapBufferEx(a->fd, 4, kind, buffer->fd, 0x10000, 0, 0, 0, iova_out);
 }
 
 Result nvasBindToChannel(NvAddressSpace* a, NvChannel* channel) {
diff --git a/nx/source/nvidia/buffer.c b/nx/source/nvidia/buffer.c
index bab5bc3e..39aa22e0 100644
--- a/nx/source/nvidia/buffer.c
+++ b/nx/source/nvidia/buffer.c
@@ -43,6 +43,8 @@ static Result _nvbufCreate(NvBuffer* m, size_t size, u32 flags, u32 align, NvBuf
 {
     Result rc;
 
+    size = (size + 0xFFF) &~ 0xFFF;
+
     m->has_init = true;
     m->size = size;
     m->fd = -1;
diff --git a/nx/source/nvidia/gpu/gpu.c b/nx/source/nvidia/gpu/gpu.c
index 5829b2c2..fca00d91 100644
--- a/nx/source/nvidia/gpu/gpu.c
+++ b/nx/source/nvidia/gpu/gpu.c
@@ -27,6 +27,12 @@ Result nvgpuCreate(NvGpu* g)
     if (R_SUCCEEDED(rc))
         rc = nvfifoCreate(&g->gpfifo, &g->gpu_channel);
 
+    if (R_SUCCEEDED(rc))
+        rc = nv3dCreate(&g->_3d_ctx, g);
+
+    if (R_SUCCEEDED(rc))
+        rc = nvchannelSetPriority(&g->gpu_channel, NvChannelPriority_Medium);
+
     if (R_SUCCEEDED(rc))
         rc = nvzcullCreate(&g->zcull_ctx, g);
 
@@ -41,6 +47,8 @@ void nvgpuClose(NvGpu* g)
     nvbufExit();
     nvinfoExit();
 
+    nvzcullClose(&g->zcull_ctx);
+    nv3dClose(&g->_3d_ctx);
     nvfifoClose(&g->gpfifo);
     nvasClose(&g->addr_space);
     nvchannelClose(&g->gpu_channel);
diff --git a/nx/source/nvidia/gpu/zcull_ctx.c b/nx/source/nvidia/gpu/zcull_ctx.c
index 565e52a0..4776e4fe 100644
--- a/nx/source/nvidia/gpu/zcull_ctx.c
+++ b/nx/source/nvidia/gpu/zcull_ctx.c
@@ -5,13 +5,17 @@ Result nvzcullCreate(NvZcullContext* z, NvGpu* parent)
     Result rc;
 
     z->parent = parent;
-    rc = nvbufCreateRw(&z->ctx_buf, nvinfoGetZcullCtxSize(), 0x1000, NvBufferKind_Pitch);
+    rc = nvbufCreateRw(&z->ctx_buf, nvinfoGetZcullCtxSize(), 0x20000, NvBufferKind_Pitch);
 
     iova_t iova_out;
 
     if (R_SUCCEEDED(rc))
         rc = nvasMapBuffer(&parent->addr_space, &z->ctx_buf, NvBufferKind_Pitch, &iova_out);
 
+    if (R_SUCCEEDED(rc))
+
+        rc = nvasMapBuffer(&parent->addr_space, &z->ctx_buf, NvBufferKind_Generic_16BX2, /*&iova_out*/ NULL);
+
     if (R_SUCCEEDED(rc))
         rc = nvioctlChannel_ZCullBind(parent->gpu_channel.fd, iova_out, NvZcullConfig_SeparateBuffer);