mirror of
https://github.com/switchbrew/libnx.git
synced 2025-06-21 12:32:40 +02:00
85a20f43dc
- Now contains a 'page_size' field, used throughout the functions - Removed NvPageSize - Removed nvAddressSpaceReserveAlign/AtFixedAddr/Full - Added nvAddressSpaceAlloc/AllocFixed/Free (replacing above functions) - Removed nvAddressSpaceMapBuffer/UnmapBuffer - Added nvAddressSpaceMap/MapFixed/Modify/Unmap (replacing above functions) - Adapted NvBuffer/NvGpu to use the new functions
133 lines
2.8 KiB
C
133 lines
2.8 KiB
C
#include <malloc.h>
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#include "types.h"
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#include "result.h"
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#include "arm/atomics.h"
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#include "arm/cache.h"
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#include "kernel/svc.h"
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#include "services/nv.h"
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#include "nvidia/ioctl.h"
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#include "nvidia/buffer.h"
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#include "nvidia/address_space.h"
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static u32 g_nvmap_fd = -1;
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static u64 g_refCnt;
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Result nvBufferInit(void)
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{
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Result rc;
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if (atomicIncrement64(&g_refCnt) > 0)
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return 0;
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rc = nvOpen(&g_nvmap_fd, "/dev/nvmap");
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if (R_FAILED(rc))
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atomicDecrement64(&g_refCnt);
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return rc;
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}
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void nvBufferExit(void)
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{
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if (atomicDecrement64(&g_refCnt) == 0)
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{
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if (g_nvmap_fd != -1)
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nvClose(g_nvmap_fd);
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g_nvmap_fd = -1;
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}
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}
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u32 nvBufferGetNvmapFd(void) {
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return g_nvmap_fd;
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}
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Result nvBufferCreate(
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NvBuffer* m, size_t size, u32 align, bool is_cpu_cacheable, bool is_gpu_cacheable, NvKind kind,
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NvAddressSpace* as)
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{
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Result rc;
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size = (size + align - 1) & ~(align - 1);
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m->has_init = true;
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m->is_cpu_cacheable = is_cpu_cacheable;
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m->is_gpu_cacheable = is_gpu_cacheable;
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m->size = size;
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m->fd = -1;
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m->cpu_addr = memalign(align, size);
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m->gpu_addr = 0;
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m->gpu_addr_texture = 0;
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m->addr_space = as;
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m->kind = kind;
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if (m->cpu_addr == NULL)
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return MAKERESULT(Module_Libnx, LibnxError_OutOfMemory);
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rc = nvioctlNvmap_Create(g_nvmap_fd, size, &m->fd);
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if (R_SUCCEEDED(rc))
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rc = nvioctlNvmap_Alloc(g_nvmap_fd, m->fd,
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0, is_cpu_cacheable ? 1 : 0, align, kind, m->cpu_addr);
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if (R_SUCCEEDED(rc) && !is_cpu_cacheable) {
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armDCacheFlush(m->cpu_addr, m->size);
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svcSetMemoryAttribute(m->cpu_addr, m->size, 8, 8);
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}
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if (R_SUCCEEDED(rc))
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rc = nvAddressSpaceMap(as, m->fd, is_gpu_cacheable, NvKind_Pitch, &m->gpu_addr);
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if (R_FAILED(rc))
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nvBufferFree(m);
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return rc;
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}
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void nvBufferFree(NvBuffer* m)
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{
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if (!m->has_init)
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return;
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if (m->gpu_addr_texture) {
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nvAddressSpaceUnmap(m->addr_space, m->gpu_addr_texture);
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m->gpu_addr_texture = 0;
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}
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if (m->gpu_addr) {
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nvAddressSpaceUnmap(m->addr_space, m->gpu_addr);
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m->gpu_addr = 0;
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}
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if (m->fd != -1) {
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nvioctlNvmap_Free(g_nvmap_fd, m->fd);
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m->fd = -1;
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}
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if (m->cpu_addr) {
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if (!m->is_cpu_cacheable)
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svcSetMemoryAttribute(m->cpu_addr, m->size, 8, 0);
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free(m->cpu_addr);
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m->cpu_addr = NULL;
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}
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m->has_init = false;
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}
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void* nvBufferGetCpuAddr(NvBuffer* m) {
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return m->cpu_addr;
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}
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iova_t nvBufferGetGpuAddr(NvBuffer* m) {
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return m->gpu_addr;
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}
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Result nvBufferMapAsTexture(NvBuffer* m, NvKind kind) {
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return nvAddressSpaceMap(m->addr_space, m->fd, m->is_gpu_cacheable, kind, &m->gpu_addr_texture);
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}
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iova_t nvBufferGetGpuAddrTexture(NvBuffer* m) {
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return m->gpu_addr_texture;
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}
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