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Data Fields</h2></td></tr>
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<a class="el" href="types_8h.html#a3f7e2bcbb0b4c338f3c4f6c937cd4234">u64</a> </td><td class="memItemRight" valign="bottom"><b>cpu_gprs</b> [9]</td></tr>
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<tr class="memdesc:a327de2072d6c154ed74bd1ed187dfbb7"><td class="mdescLeft"> </td><td class="mdescRight">GPRs 0..8. <br /></td></tr>
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<a class="el" href="types_8h.html#a3f7e2bcbb0b4c338f3c4f6c937cd4234">u64</a> </td><td class="memItemRight" valign="bottom"><b>lr</b></td></tr>
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<a class="el" href="types_8h.html#a3f7e2bcbb0b4c338f3c4f6c937cd4234">u64</a> </td><td class="memItemRight" valign="bottom"><b>sp</b></td></tr>
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<a class="el" href="types_8h.html#a3f7e2bcbb0b4c338f3c4f6c937cd4234">u64</a> </td><td class="memItemRight" valign="bottom"><b>elr_el1</b></td></tr>
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<a class="el" href="types_8h.html#afaa62991928fb9fb18ff0db62a040aba">u32</a> </td><td class="memItemRight" valign="bottom"><b>pstate</b></td></tr>
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<tr class="memdesc:a3bba97641512e4c746b20c8d32433198"><td class="mdescLeft"> </td><td class="mdescRight">pstate & 0xFF0FFE20 <br /></td></tr>
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<a class="el" href="types_8h.html#afaa62991928fb9fb18ff0db62a040aba">u32</a> </td><td class="memItemRight" valign="bottom"><b>afsr0</b></td></tr>
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<a class="el" href="types_8h.html#afaa62991928fb9fb18ff0db62a040aba">u32</a> </td><td class="memItemRight" valign="bottom"><b>afsr1</b></td></tr>
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<a class="el" href="types_8h.html#afaa62991928fb9fb18ff0db62a040aba">u32</a> </td><td class="memItemRight" valign="bottom"><b>esr</b></td></tr>
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<a class="el" href="types_8h.html#a3f7e2bcbb0b4c338f3c4f6c937cd4234">u64</a> </td><td class="memItemRight" valign="bottom"><b>far</b></td></tr>
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<hr/>The documentation for this struct was generated from the following file:<ul>
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<li>include/switch/arm/<a class="el" href="thread__context_8h_source.html">thread_context.h</a></li>
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