From e689d9a1fbfaa3bee2fcf9685b47dcae199458f7 Mon Sep 17 00:00:00 2001 From: plutooo Date: Sun, 15 Apr 2018 19:48:59 +0200 Subject: [PATCH] Rename NvCmd and VnCmd --- nx/include/switch/nvidia/cmds/common.h | 5 --- nx/include/switch/nvidia/cmds/vn.h | 10 ++++- nx/include/switch/nvidia/gpu/cmd_list.h | 2 +- nx/source/nvidia/cmds/3d_clear.c | 8 ++-- nx/source/nvidia/cmds/3d_init.c | 54 ++++++++++++------------- nx/source/nvidia/cmds/3d_rendertarget.c | 4 +- nx/source/nvidia/cmds/3d_viewport.c | 2 +- nx/source/nvidia/cmds/common.c | 2 +- 8 files changed, 44 insertions(+), 43 deletions(-) diff --git a/nx/include/switch/nvidia/cmds/common.h b/nx/include/switch/nvidia/cmds/common.h index 39c3851d..e69de29b 100644 --- a/nx/include/switch/nvidia/cmds/common.h +++ b/nx/include/switch/nvidia/cmds/common.h @@ -1,5 +0,0 @@ -enum { - NvCmdCommon_BindObject = 0 -}; - -void nvCmdsInit(NvCmdList* cmds); diff --git a/nx/include/switch/nvidia/cmds/vn.h b/nx/include/switch/nvidia/cmds/vn.h index 905cb470..a73f1fdc 100644 --- a/nx/include/switch/nvidia/cmds/vn.h +++ b/nx/include/switch/nvidia/cmds/vn.h @@ -1,3 +1,7 @@ +enum { + NvCmdCommon_BindObject = 0 +}; + typedef struct { NvGpu* parent; NvCmdList cmd_list; @@ -6,10 +10,12 @@ typedef struct { NvBuffer const_buffer0; } Vn; -#define VnCmd(vn, ...) \ - NvCmd(&(vn)->cmd_list, __VA_ARGS__) +#define vnAddCmd(vn, ...) \ + nvCmdListAddCmd(&(vn)->cmd_list, __VA_ARGS__) static inline Result vnSubmit(Vn* v) { NvFence f; return nvGpfifoSubmit(&v->parent->gpfifo, &v->cmd_list, &f); } + +Result vnInit(Vn* vn, NvGpu* parent); diff --git a/nx/include/switch/nvidia/gpu/cmd_list.h b/nx/include/switch/nvidia/gpu/cmd_list.h index 4ec83e1b..d5c504a3 100644 --- a/nx/include/switch/nvidia/gpu/cmd_list.h +++ b/nx/include/switch/nvidia/gpu/cmd_list.h @@ -14,7 +14,7 @@ u64 nvCmdListGetListSize(NvCmdList* c); u32* nvCmdListInsert(NvCmdList* c, size_t num_cmds); -#define NvCmd(cmd_list, ...) do { \ +#define nvCmdListAddCmd(cmd_list, ...) do { \ u32 _[] = { __VA_ARGS__ }; \ memcpy(nvCmdListInsert(cmd_list, sizeof(_)/4), _, sizeof(_)); \ } while (0) diff --git a/nx/source/nvidia/cmds/3d_clear.c b/nx/source/nvidia/cmds/3d_clear.c index 1adf5cb5..f6cc15ca 100644 --- a/nx/source/nvidia/cmds/3d_clear.c +++ b/nx/source/nvidia/cmds/3d_clear.c @@ -4,13 +4,13 @@ void vnClearBuffer( Vn* vn, NvBuffer* buf, u32 width, u32 height, float colors[4]) { - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvReg3D_ClearColor, f2i(colors[0]), f2i(colors[1]), f2i(colors[2]), f2i(colors[3])), NvIncr(0, NvReg3D_ScreenScissorHorizontal, 0 | (width << 16), 0 | (height << 16)), NvIncr(0, NvReg3D_RenderTargetControl, (076543210 << 4) | 1)); // bit0 probably enables RT #0 iova_t gpu_addr = nvBufferGetGpuAddr(buf); - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvReg3D_RenderTargetNAddr + 0x10*0, gpu_addr >> 32, gpu_addr, width, height, @@ -22,10 +22,10 @@ void vnClearBuffer( )); // Disable zeta + multisample - VnCmd(vn, NvImm(0, 0x54E, 0), NvImm(0, 0x54D, 0)); + vnAddCmd(vn, NvImm(0, 0x54E, 0), NvImm(0, 0x54D, 0)); // Only layer 0. int z; for (z=0; z<1; z++) - VnCmd(vn, NvImm(0, NvReg3D_ClearBufferTrigger, 0x3c | (z << 10))); + vnAddCmd(vn, NvImm(0, NvReg3D_ClearBufferTrigger, 0x3c | (z << 10))); } diff --git a/nx/source/nvidia/cmds/3d_init.c b/nx/source/nvidia/cmds/3d_init.c index d0de4840..41a5b8f2 100644 --- a/nx/source/nvidia/cmds/3d_init.c +++ b/nx/source/nvidia/cmds/3d_init.c @@ -4,7 +4,7 @@ Result vnInit3D(Vn* vn) { Result rc; - VnCmd(vn, + vnAddCmd(vn, // ??? NvIncr(0, NvReg3D_MmeShadowScratch(0x1A), 0, 0xffffffff), NvImm(0, NvReg3D_MmeShadowScratch(0x19), 0), @@ -26,10 +26,10 @@ Result vnInit3D(Vn* vn) { size_t i; for (i=0; i<16; i++) { - VnCmd(vn, NvImm(0, NvReg3D_ScissorEnable(i), 1)); + vnAddCmd(vn, NvImm(0, NvReg3D_ScissorEnable(i), 1)); } - VnCmd(vn, NvImm(0, NvReg3D_PrimRestartWithDrawArrays, 1), + vnAddCmd(vn, NvImm(0, NvReg3D_PrimRestartWithDrawArrays, 1), NvImm(0, NvReg3D_PointRasterRules, 0), NvImm(0, NvReg3D_LinkedTsc, 0), NvImm(0, NvReg3D_ProvokingVertexLast, 1), @@ -48,10 +48,10 @@ Result vnInit3D(Vn* vn) { NvImm(0, 0x584, 0xe)); for (i=0; i<16; i++) { - VnCmd(vn, NvImm(0, NvReg3D_VertexStreamEnableDivisor(i), 0)); + vnAddCmd(vn, NvImm(0, NvReg3D_VertexStreamEnableDivisor(i), 0)); } - VnCmd( + vnAddCmd( vn, NvImm(0, NvReg3D_VertexIdGenMode, 0), NvImm(0, NvReg3D_ZcullStatCtrsEnable, 1), @@ -74,7 +74,7 @@ Result vnInit3D(Vn* vn) { ); // Initializes some 2D things.. - VnCmd( + vnAddCmd( vn, NvImm(3, 0xab, 3), // SetOperation? NvImm(3, 0xa4, 0), // SetClipEnable @@ -88,7 +88,7 @@ Result vnInit3D(Vn* vn) { // TODO: Call macro_14f(0x00419a04, 1, 1). // TODO: Call macro_14f(0x00419a04, 2, 2). - VnCmd( + vnAddCmd( vn, // Reset Zcull. NvImm(0, 0x65a, 0x11), @@ -108,7 +108,7 @@ Result vnInit3D(Vn* vn) { return rc; iova_t gpu_addr = nvBufferGetGpuAddr(&vn->vertex_runout); - VnCmd(vn, NvIncr(0, NvReg3D_VertexRunoutAddr, gpu_addr >> 32, gpu_addr)); + vnAddCmd(vn, NvIncr(0, NvReg3D_VertexRunoutAddr, gpu_addr >> 32, gpu_addr)); // TODO: Call macro_206(0x194); @@ -127,7 +127,7 @@ Result vnInit3D(Vn* vn) { gpu_addr = nvBufferGetGpuAddr(&vn->const_buffer0); - VnCmd(vn, + vnAddCmd(vn, NvIncr( 0, NvReg3D_ConstantBufferSize, 0x5f00, @@ -137,12 +137,12 @@ Result vnInit3D(Vn* vn) { gpu_addr += 0x5f00; for (i=0; i<5; i++) { - VnCmd(vn, NvImm(0, NvReg3D_ConstantBufferBind(i), 1)); + vnAddCmd(vn, NvImm(0, NvReg3D_ConstantBufferBind(i), 1)); } // Bind const buffer index 2 to differnet buffers (each of size 0x200). for (i=0; i<5; i++) { - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvReg3D_ConstantBufferSize, 0x5f00, // Size @@ -157,7 +157,7 @@ Result vnInit3D(Vn* vn) { gpu_addr += 0x200; } - VnCmd(vn, + vnAddCmd(vn, NvImm(0, NvReg3D_BlendIndependent, 1), NvImm(0, NvReg3D_EdgeFlag, 1), NvImm(0, NvReg3D_ViewportTransformEnable, 1), @@ -168,7 +168,7 @@ Result vnInit3D(Vn* vn) { // Reset all the viewports. for (i=0; i<16; i++) { - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvReg3D_ViewportScaleX(i), f2i(0.5), /* ScaleX */ f2i(0.5), /* ScaleY */ @@ -184,11 +184,11 @@ Result vnInit3D(Vn* vn) { ); } - //VnCmd(vn, NvImm(0, NvReg3D_ScreenHorizontalControl, 0x10)); // FAULTY + //vnAddCmd(vn, NvImm(0, NvReg3D_ScreenHorizontalControl, 0x10)); // FAULTY // Reset all the scissors. for (i=0; i<16; i++) { - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvReg3D_ScissorHorizontal(i), (0xffff << 16) | 0, /* Horizontal */ (0xffff << 16) | 0 /* Vertical */ @@ -197,20 +197,20 @@ Result vnInit3D(Vn* vn) { } // Setup RAM for macros. - VnCmd(vn, + vnAddCmd(vn, NvImm(0, NvReg3D_MmeShadowRamControl, 1), NvIncr(0, NvReg3D_MmeShadowScratch(0x1c), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0xffffffff) ); // Reset IndexArrayLimit. - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvReg3D_IndexArrayLimit, 0xFF, 0xFFFFFFFF), NvImm(0, NvReg3D_PrimRestartWithDrawArrays, 0) ); // More RAM setup. - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvReg3D_MmeShadowScratch(0x2a), 0x0500055f), NvIncr(0, NvReg3D_MmeShadowScratch(0x2b), 0x05000561), NvIncr(0, NvReg3D_MmeShadowScratch(0x2c), 0x05000563), @@ -223,7 +223,7 @@ Result vnInit3D(Vn* vn) { NvImm(0, NvReg3D_MmeShadowScratch(0x33), 0x200) ); - VnCmd( + vnAddCmd( vn, NvIncr(0, NvReg3D_SampleCountEnable, 1), NvIncr(0, NvReg3D_ClipDistanceEnable, 0xff), @@ -237,9 +237,9 @@ Result vnInit3D(Vn* vn) { // NvImm(0, 0xe2a, 0x184)); // MACRO CALL NOT IMPLEMENTED // TODO: Call macro_206(0x184); - //VnCmd(vn, NvIncr(0, NvReg3D_ConstantBufferLoadN, 0x44fffe00)); + //vnAddCmd(vn, NvIncr(0, NvReg3D_ConstantBufferLoadN, 0x44fffe00)); - VnCmd( + vnAddCmd( vn, NvImm(0, NvReg3D_ZetaArrayMode, 1), NvImm(0, NvReg3D_ConservativeRaster, 0), @@ -247,7 +247,7 @@ Result vnInit3D(Vn* vn) { // TODO: Call macro_14f(0x00418800, 0, 0x01800000); - VnCmd( + vnAddCmd( vn, NvImm(0, NvReg3D_MmeShadowScratch(0x34), 0), NvImm(0, 0xbb, 0), @@ -257,9 +257,9 @@ Result vnInit3D(Vn* vn) { NvImm(0, NvReg3D_MultisampleCoverageToColor, 0) ); - //VnCmd(vn, NvIncr(0, NvReg3D_CodeAddr, 4, 0x00000000)); + //vnAddCmd(vn, NvIncr(0, NvReg3D_CodeAddr, 4, 0x00000000)); - VnCmd(vn, + vnAddCmd(vn, NvImm(0, NvReg3D_MmeShadowScratch(0x27), 0x230), NvImm(0, NvReg3D_MmeShadowScratch(0x23), 0x430), NvImm(0, 0x5ad, 0) @@ -289,7 +289,7 @@ Result vnInit3D(Vn* vn) { // TODO: Call macro_14f(0x00418e6c, 0x644, 0xffff); // Setting up TiledCache and other stuff. - VnCmd(vn, + vnAddCmd(vn, NvImm(0, 0x3d8, 0), NvIncr(0, 0x3d9, 0x00800080), NvIncr(0, 0x3da, 0x1109), @@ -318,14 +318,14 @@ Result vnInit3D(Vn* vn) { */ // Flush texture info cache. - VnCmd(vn, + vnAddCmd(vn, NvImm(0, 0x4a2, 0), NvImm(0, 0x369, 0x11), NvImm(0, 0x50a, 0), NvImm(0, 0x509, 0) ); - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, 0x1e9, 0x7ff8), NvIncr(0, 0x1ea, 0x7ffc) ); diff --git a/nx/source/nvidia/cmds/3d_rendertarget.c b/nx/source/nvidia/cmds/3d_rendertarget.c index 0d3b4976..46ffda5c 100644 --- a/nx/source/nvidia/cmds/3d_rendertarget.c +++ b/nx/source/nvidia/cmds/3d_rendertarget.c @@ -4,12 +4,12 @@ void vnSetRenderTargets(Vn* vn, VnRenderTargetConfig* targets, size_t num_targets) { size_t i; - VnCmd(vn, NvIncr(0, NvReg3D_RenderTargetControl, (076543210 << 4) | num_targets)); + vnAddCmd(vn, NvIncr(0, NvReg3D_RenderTargetControl, (076543210 << 4) | num_targets)); for (i=0; i void vnSetViewport(Vn* vn, size_t index, VnViewportConfig* c) { - VnCmd( + vnAddCmd( vn, NvIncr( 0, diff --git a/nx/source/nvidia/cmds/common.c b/nx/source/nvidia/cmds/common.c index 122577ae..34e021c1 100644 --- a/nx/source/nvidia/cmds/common.c +++ b/nx/source/nvidia/cmds/common.c @@ -12,7 +12,7 @@ Result vnInit(Vn* vn, NvGpu* parent) if (R_FAILED(rc)) return rc; - VnCmd(vn, + vnAddCmd(vn, NvIncr(0, NvCmdCommon_BindObject, NvClassNumber_3D), NvIncr(1, NvCmdCommon_BindObject, NvClassNumber_Compute), NvIncr(2, NvCmdCommon_BindObject, NvClassNumber_Kepler),