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Started on GPU initialization

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This commit is contained in:
plutooo 2018-03-30 19:57:10 +02:00
parent 9e1d4dbb67
commit b819f8372f
4 changed files with 148 additions and 12 deletions
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44
nx/include/switch/nvidia/cmds/3d.h
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@ -1,8 +1,6 @@
enum {
NvReg3D_ClearColor = 0x360,
NvReg3D_ScreenScissorHorizontal = 0x3fd,
NvReg3D_ScreenScissorVertical = 0x3fe,
NvReg3D_RenderTargetControl = 0x487,
NvReg3D_LineWidthSeparate = 0x83,
NvReg3D_LocalBase = 0x1df,
NvReg3D_RenderTargetNAddr = 0x200,
NvReg3D_RenderTargetNHorizontal = 0x202,
NvReg3D_RenderTargetNVertical = 0x203,
@ -11,8 +9,46 @@ enum {
NvReg3D_RenderTargetNArrayMode = 0x206,
NvReg3D_RenderTargetNLayerStride = 0x207,
NvReg3D_RenderTargetNBaseLayer = 0x208,
NvReg3D_ClipRectNHorizontal = 0x340,
NvReg3D_ClipRectNVertical = 0x341,
NvReg3D_CallLimitLog = 0x359,
NvReg3D_ClearColor = 0x360,
NvReg3D_PrimRestartWithDrawArrays = 0x37a,
NvReg3D_ScissorNEnable = 0x380,
NvReg3D_ScissorNHorizontal = 0x381,
NvReg3D_ScissorNVertical = 0x382,
NvReg3D_VertexRunoutAddr = 0x3e1,
NvReg3D_ScreenScissorHorizontal = 0x3fd,
NvReg3D_ScreenScissorVertical = 0x3fe,
NvReg3D_ClearFlags = 0x43e,
NvReg3D_RenderTargetControl = 0x487,
NvReg3D_LinkedTsc = 0x48d,
NvReg3D_ZcullStatCtrsEnable = 0x547,
NvReg3D_MultisampleEnable = 0x54d,
NvReg3D_MultisampleControl = 0x54f,
NvReg3D_ZcullRegion = 0x564,
NvReg3D_StencilTwoSideEnable = 0x565,
NvReg3D_MultisampleCsaaEnable = 0x56d,
NvReg3D_Layer = 0x573,
NvReg3D_MultisampleMode = 0x574,
NvReg3D_VertexIdGenMode = 0x593,
NvReg3D_PointRasterRules = 0x597,
NvReg3D_ProvokingVertexLast = 0x5a1,
NvReg3D_VertexStreamNEnableDivisor = 0x620,
NvReg3D_ZcullTestMask = 0x65b,
NvReg3D_ClearBufferTrigger = 0x674,
NvReg3D_TextureConstBufferIndex = 0x982,
};
#define NvReg3D_ClipRectHorizontal(n) \
((NvReg3D_ClipRectNHorizontal) + 2*(n))
#define NvReg3D_ClipRectVertical(n) \
((NvReg3D_ClipRectNVertical) + 2*(n))
#define NvReg3D_ScissorEnable(n) \
((NvReg3D_ScissorNEnable) + 4*(n))
#define NvReg3D_VertexStreamEnableDivisor(n) \
((NvReg3D_VertexStreamNEnableDivisor) + (n))
void nvCmdsClearColor(NvCmdList* cmds, float colors[4]);

6
nx/include/switch/nvidia/gpu/cmd_list.h
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@ -22,13 +22,13 @@ u32* nvCmdListInsert(NvCmdList* c, size_t num_cmds);
(0x80000000 | (reg) | ((subc) << 13) | ((val) << 16))
#define NvRep(subc, reg, ...) \
(0x60000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ })) << 16))), __VA_ARGS__
(0x60000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ }) / 4) << 16))), __VA_ARGS__
#define NvIncr(subc, reg, ...) \
(0x20000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ })) << 16))), __VA_ARGS__
(0x20000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ }) / 4) << 16))), __VA_ARGS__
#define NvIncrOnce(subc, reg, ...) \
(0xA0000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ })) << 16))), __VA_ARGS__
(0xA0000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ }) / 4) << 16))), __VA_ARGS__
static inline u32 f2i(float f) {
#pragma GCC diagnostic ignored "-Wstrict-aliasing"

99
nx/source/nvidia/cmds/3d.c
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@ -1,6 +1,105 @@
#include <switch.h>
#include <string.h>
void nvCmds3DInitialize(NvCmdList* cmds) {
NvCmd(
cmds,
// ???
NvIncr(0, 0xd1a, 0, 0xffffffff),
NvImm(0, 0xd19, 0),
// Reset multisampling
NvImm(0, NvReg3D_MultisampleEnable, 0),
NvImm(0, NvReg3D_MultisampleCsaaEnable, 0),
NvImm(0, NvReg3D_MultisampleMode, 0),
NvImm(0, NvReg3D_MultisampleControl, 0),
// ???
NvImm(0, 0x433, 4),
NvImm(0, 0x438, 0xff),
NvImm(0, 0x439, 0xff),
NvImm(0, 0x43b, 0xff),
NvImm(0, 0x43c, 4),
NvImm(0, 0x1d3, 0x3f),
//
NvIncr(0, NvReg3D_ClipRectNHorizontal, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0),
NvImm(0, NvReg3D_ClearFlags, 0x101));
size_t i;
for (i=0; i<16; i++)
NvCmd(cmds, NvImm(0, NvReg3D_ScissorEnable(i), 1));
NvCmd(cmds, NvImm(0, NvReg3D_PrimRestartWithDrawArrays, 1),
NvImm(0, NvReg3D_PointRasterRules, 0),
NvImm(0, NvReg3D_LinkedTsc, 0),
NvImm(0, NvReg3D_ProvokingVertexLast, 1),
// ???
NvImm(0, 0x54a, 0),
NvImm(0, 0x400, 0x10),
NvImm(0, 0x86, 0x10),
NvImm(0, 0x43f, 0x10),
NvImm(0, 0x4a4, 0x10),
NvImm(0, 0x4b6, 0x10),
NvImm(0, 0x4b7, 0x10),
//
NvImm(0, NvReg3D_CallLimitLog, 8),
// ???
NvImm(0, 0x450, 0x10),
NvImm(0, 0x584, 0xe));
for (i=0; i<16; i++) {
NvCmd(cmds, NvImm(0, NvReg3D_VertexStreamEnableDivisor(i), 0));
}
NvCmd(
cmds,
NvImm(0, NvReg3D_VertexIdGenMode, 0),
NvImm(0, NvReg3D_ZcullStatCtrsEnable, 1),
NvImm(0, NvReg3D_LineWidthSeparate, 1),
// ???
NvImm(0, 0xc3, 0),
NvImm(0, 0xc0, 3),
NvImm(0, 0x3f7, 1),
NvImm(0, 0x670, 1),
NvImm(0, 0x3e3, 0),
NvImm(0, NvReg3D_StencilTwoSideEnable, 1),
NvImm(0, NvReg3D_TextureConstBufferIndex, 2),
NvImm(0, 0xc4, 0x503),
NvIncr(0, NvReg3D_LocalBase, 0x01000000),
NvImm(0, 0x44c, 0x13),
NvImm(0, 0xdd, 0),
NvIncr(0, NvReg3D_Layer, 0x10000),
NvImm(0, 0x488, 5),
NvIncr(0, 0x514, 0x00800008),
NvImm(0, 0xab, 3),
NvImm(0, 0xa4, 0),
NvImm(0, 0x221, 0x3f));
// TODO: Call some macro shit (0xe16).
NvCmd(
cmds,
// Reset Zcull.
NvImm(0, NvReg3D_ZcullTestMask, 0),
NvImm(0, 0x65a, 0x11),
NvImm(0, NvReg3D_ZcullRegion, 0),
NvIncr(0, 0x054, 0x49000000, 0x49000001),
NvIncr(0, 0xd18, 0x05000500),
);
// TODO: Call some macro shit (0xe34)
// TODO: Fill in NvReg3D_VertexRunoutAddr with a valid addr.
// TODO: Call some macro shit (0xe2a)
// TODO: CB_DATA stuff
// TODO: Call some macro shit (0xe32)
// TODO: CB_DATA stuff
// TODO: CB_BIND stuff
}
void nvCmdsClearBuffer(
NvCmdList* cmds, NvBuffer* buf, u32 width, u32 height, float colors[4])
{

11
nx/source/nvidia/cmds/common.c
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@ -2,9 +2,10 @@
#include <string.h>
void nvCmdsFifoInit(NvCmdList* cmds) {
NvCmd(cmds, NvIncr(0, NvCmdCommon_BindObject, NvClassNumber_3D));
NvCmd(cmds, NvIncr(1, NvCmdCommon_BindObject, NvClassNumber_Compute));
NvCmd(cmds, NvIncr(2, NvCmdCommon_BindObject, NvClassNumber_Kepler));
NvCmd(cmds, NvIncr(3, NvCmdCommon_BindObject, NvClassNumber_2D));
NvCmd(cmds, NvIncr(4, NvCmdCommon_BindObject, NvClassNumber_DMA));
NvCmd(cmds,
NvIncr(0, NvCmdCommon_BindObject, NvClassNumber_3D),
NvIncr(1, NvCmdCommon_BindObject, NvClassNumber_Compute),
NvIncr(2, NvCmdCommon_BindObject, NvClassNumber_Kepler),
NvIncr(3, NvCmdCommon_BindObject, NvClassNumber_2D),
NvIncr(4, NvCmdCommon_BindObject, NvClassNumber_DMA));
}