ARM cache operations

nx/include/switch.h

@@ -22,7 +22,8 @@ extern "C" {
 #include "switch/kernel/random.h"
 #include "switch/kernel/jit.h"
 
-#include "switch/arm.h"
+#include "switch/arm/tls.h"
+#include "switch/arm/cache.h"
 #include "switch/ipc.h"
 
 #include "switch/services/sm.h"

nx/include/switch/arm/cache.h

@@ -0,0 +1,7 @@
+#pragma once
+
+void armDCacheFlush(void* addr, size_t size);
+void armDCacheClean(void* addr, size_t size);
+void armICacheInvalidate(void* addr, size_t size);
+
+void armDCacheZero(void* addr, size_t size);

nx/include/switch/arm/tls.h

@@ -1,10 +1,7 @@
 #pragma once
-#include "types.h"
 
 static inline void* armGetTls(void) {
     void* ret;
     __asm__ ("mrs %x[data], tpidrro_el0" : [data] "=r" (ret));
     return ret;
 }
-
-void armDCacheFlush(void* addr, size_t size);

nx/include/switch/ipc.h

@@ -1,7 +1,7 @@
 // Copyright 2017 plutoo
 #pragma once
-#include "arm.h"
 #include "result.h"
+#include "arm/tls.h"
 #include "kernel/svc.h"
 
 #define SFCI_MAGIC 0x49434653

nx/source/arm/cache.s

@@ -23,7 +23,7 @@ CODE_BEGIN armDCacheFlush
 	mov x10, x1
 
 armDCacheFlush_L0:
-	dc civac, x8
+	dc  civac, x8
 	add x8, x8, x9
 	cmp x8, x10
 	bcc armDCacheFlush_L0
@@ -32,3 +32,64 @@ armDCacheFlush_L0:
 	ret
 CODE_END
 
+CODE_BEGIN armDCacheClean
+	add x1, x1, x0
+	mrs x8, CTR_EL0
+	lsr x8, x8, #16
+	and x8, x8, #0xf
+	mov x9, #4
+	lsl x9, x9, x8
+	sub x10, x9, #1
+	bic x8, x0, x10
+	mov x10, x1
+
+armDCacheClean_L0:
+	dc  cvac, x8
+	add x8, x8, x9
+	cmp x8, x10
+	bcc armDCacheClean_L0
+
+	dsb sy
+	ret
+CODE_END
+
+CODE_BEGIN armICacheInvalidate
+	add x1, x1, x0
+	mrs x8, CTR_EL0
+	and x8, x8, #0xf
+	mov x9, #4
+	lsl x9, x9, x8
+	sub x10, x9, #1
+	bic x8, x0, x10
+	mov x10, x1
+
+armICacheInvalidate_L0:
+	ic  ivau, x8
+	add x8, x8, x9
+	cmp x8, x10
+	bcc armICacheInvalidate_L0
+
+	dsb sy
+	ret
+CODE_END
+
+CODE_BEGIN armDCacheZero
+	add x1, x1, x0
+	mrs x8, CTR_EL0
+	lsr x8, x8, #16
+	and x8, x8, #0xf
+	mov x9, #4
+	lsl x9, x9, x8
+	sub x10, x9, #1
+	bic x8, x0, x10
+	mov x10, x1
+
+armDCacheZero_L0:
+	dc  zva, x8
+	add x8, x8, x9
+	cmp x8, x10
+	bcc armDCacheZero_L0
+
+	dsb sy
+	ret
+CODE_END

nx/source/gfx/gfx.c

@@ -1,6 +1,7 @@
 #include <string.h>
 #include "types.h"
 #include "result.h"
+#include "arm/cache.h"
 #include "services/fatal.h"
 #include "services/vi.h"
 #include "services/applet.h"

nx/source/gfx/nvgfx.c

@@ -1,8 +1,8 @@
 #include <string.h>
 #include <malloc.h>
 #include "types.h"
-#include "arm.h"
 #include "result.h"
+#include "arm/cache.h"
 #include "kernel/svc.h"
 #include "services/nv.h"
 #include "gfx/binder.h"

nx/source/internal.h

@@ -1,6 +1,6 @@
 #pragma once
-#include "arm.h"
 #include "types.h"
+#include "arm/tls.h"
 #include "kernel/thread.h"
 
 #define THREADVARS_MAGIC 0x21545624 // !TV$

nx/source/services/usb.c

@@ -2,6 +2,7 @@
 #include "types.h"
 #include "result.h"
 #include "ipc.h"
+#include "arm/cache.h"
 #include "kernel/detect.h"
 #include "services/usb.h"
 #include "services/sm.h"