mika/libnx
1
0
Fork 0
mirror of https://github.com/switchbrew/libnx.git synced 2025-07-04 02:22:15 +02:00
Code Issues Packages Projects Releases Wiki Activity

Fixing some bugs

Browse Source
This commit is contained in:
plutooo 2018-03-30 20:56:07 +02:00
parent b819f8372f
commit adfe12fc53
3 changed files with 21 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
nx/include/switch/nvidia/cmds/3d.h
View File

@ -1,14 +1,14 @@
enum {
NvReg3D_LineWidthSeparate = 0x83,
NvReg3D_LocalBase = 0x1df,
NvReg3D_RenderTargetNAddr = 0x200,
NvReg3D_RenderTargetNHorizontal = 0x202,
NvReg3D_RenderTargetNVertical = 0x203,
NvReg3D_RenderTargetNFormat = 0x204,
NvReg3D_RenderTargetNTileMode = 0x205,
NvReg3D_RenderTargetNArrayMode = 0x206,
NvReg3D_RenderTargetNLayerStride = 0x207,
NvReg3D_RenderTargetNBaseLayer = 0x208,
NvReg3D_RenderTargetNAddr = 0x80,
NvReg3D_RenderTargetNHorizontal = 0x82,
NvReg3D_RenderTargetNVertical = 0x83,
NvReg3D_LineWidthSeparate = 0x83,
NvReg3D_RenderTargetNFormat = 0x84,
NvReg3D_RenderTargetNTileMode = 0x85,
NvReg3D_RenderTargetNArrayMode = 0x86,
NvReg3D_RenderTargetNLayerStride = 0x87,
NvReg3D_RenderTargetNBaseLayer = 0x88,
NvReg3D_ClipRectNHorizontal = 0x340,
NvReg3D_ClipRectNVertical = 0x341,
NvReg3D_CallLimitLog = 0x359,

21
nx/source/nvidia/cmds/3d.c
View File

@ -106,19 +106,20 @@ void nvCmdsClearBuffer(
NvCmd(cmds, NvIncr(0, NvReg3D_ClearColor,
f2i(colors[0]), f2i(colors[1]), f2i(colors[2]), f2i(colors[3])));
NvCmd(cmds, NvIncr(0, NvReg3D_ScreenScissorHorizontal,
0 | (0x100 << 16), 0 | (0x100 << 16)));
0 | (0x100 << 16), 0 | (0x100 << 16)));
NvCmd(cmds, NvImm(0, NvReg3D_RenderTargetControl, 1)); // bit0 probably enables RT #0
iova_t gpu_addr = nvBufferGetGpuAddr(buf);
NvCmd(cmds, NvIncr(NvReg3D_RenderTargetNAddr + 0x10*0,
gpu_addr >> 32, gpu_addr,
width, height,
0xfe /* Format */,
0x1000 /* TileMode */,
1 /* ArrayMode */,
0 /* Stride */,
0 /* BaseLayer */
));
NvCmd(cmds,
NvIncr(NvReg3D_RenderTargetNAddr + 0x10*0,
gpu_addr >> 32, gpu_addr,
width, height,
0 /* Format */,
0x1000 /* TileMode */,
1 /* ArrayMode */,
0 /* Stride */,
0 /* BaseLayer */
));
int z;
for (z=0; z<32; z++)
NvCmd(cmds, NvImm(0, NvReg3D_ClearBufferTrigger, 0x3c | (z << 10)));

2
nx/source/nvidia/cmds/common.c
View File

@ -3,7 +3,7 @@
void nvCmdsFifoInit(NvCmdList* cmds) {
NvCmd(cmds,
NvIncr(0, NvCmdCommon_BindObject, NvClassNumber_3D),
NvIncr(0, NvCmdCommon_BindObject, NvClassNumber_3D),
NvIncr(1, NvCmdCommon_BindObject, NvClassNumber_Compute),
NvIncr(2, NvCmdCommon_BindObject, NvClassNumber_Kepler),
NvIncr(3, NvCmdCommon_BindObject, NvClassNumber_2D),