diff --git a/nx/Makefile b/nx/Makefile
index 5e97e960..14ca0a95 100644
--- a/nx/Makefile
+++ b/nx/Makefile
@@ -24,7 +24,7 @@ VERSION	:=	$(LIBNX_MAJOR).$(LIBNX_MINOR).$(LIBNX_PATCH)
 #---------------------------------------------------------------------------------
 TARGET		:=	nx
 #BUILD		:=	build
-SOURCES		:=	source/arm source/kernel source/services source/display source/nvidia source/nvidia/gpu source/nvidia/ioctl source/runtime source/runtime/devices source/runtime/util/utf
+SOURCES		:=	source/arm source/kernel source/services source/display source/nvidia source/nvidia/gpu source/nvidia/ioctl source/nvidia/cmds/ source/runtime source/runtime/devices source/runtime/util/utf
 DATA		:=	data
 INCLUDES	:=	include external/bsd/include
 
diff --git a/nx/include/switch.h b/nx/include/switch.h
index 5848f6e8..ae6ebf07 100644
--- a/nx/include/switch.h
+++ b/nx/include/switch.h
@@ -68,6 +68,7 @@ extern "C" {
 #include "switch/nvidia/gpu/3d_ctx.h"
 #include "switch/nvidia/gpu/error_notifier.h"
 #include "switch/nvidia/gpu/gpu.h"
+#include "switch/nvidia/cmds/common.h"
 
 #include "switch/runtime/env.h"
 
diff --git a/nx/include/switch/nvidia/cmds/3d.h b/nx/include/switch/nvidia/cmds/3d.h
new file mode 100644
index 00000000..cc319000
--- /dev/null
+++ b/nx/include/switch/nvidia/cmds/3d.h
@@ -0,0 +1,3 @@
+enum {
+    NvReg3D_MultisampleEnable = 0x54d
+};
diff --git a/nx/include/switch/nvidia/cmds/common.h b/nx/include/switch/nvidia/cmds/common.h
new file mode 100644
index 00000000..8dea281e
--- /dev/null
+++ b/nx/include/switch/nvidia/cmds/common.h
@@ -0,0 +1,5 @@
+void nvCmdsFifoInit(NvCmdList* cmds);
+
+enum {
+    NvCmdCommon_BindObject = 0
+};
diff --git a/nx/include/switch/nvidia/gpu/cmd_list.h b/nx/include/switch/nvidia/gpu/cmd_list.h
index efceafb9..427b32fd 100644
--- a/nx/include/switch/nvidia/gpu/cmd_list.h
+++ b/nx/include/switch/nvidia/gpu/cmd_list.h
@@ -9,10 +9,8 @@ typedef struct {
 
 Result nvCmdListCreate(NvCmdList* c, NvGpu* parent, size_t max_cmds);
 void   nvCmdListClose(NvCmdList* c);
-
 iova_t nvCmdListGetGpuAddr(NvCmdList* c);
 u64    nvCmdListGetListSize(NvCmdList* c);
-
 u32*   nvCmdListInsert(NvCmdList* c, size_t num_cmds);
 
 #define NvCmd(cmd_list, ...) do { \
@@ -20,14 +18,14 @@ u32*   nvCmdListInsert(NvCmdList* c, size_t num_cmds);
         memcpy(nvCmdListInsert(cmd_list, sizeof(_)/4), _, sizeof(_)); \
     } while (0)
 
-#define NvImm(reg, subc, val) \
+#define NvImm(subc, reg, val) \
     (0x80000000 | (reg) | ((subc) << 13) | ((val) << 16))
 
-#define NvRep(reg, subc, ...) \
+#define NvRep(subc, reg, ...) \
     (0x60000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ })) << 16))), __VA_ARGS__
 
-#define NvIncr(reg, subc, ...) \
+#define NvIncr(subc, reg, ...) \
     (0x20000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ })) << 16))), __VA_ARGS__
 
-#define NvIncrOnce(reg, subc, ...) \
+#define NvIncrOnce(subc, reg, ...) \
     (0xA0000000 | ((reg) | ((subc) << 13) | ((sizeof((u32[]) { __VA_ARGS__ })) << 16))), __VA_ARGS__
diff --git a/nx/source/nvidia/cmds/3d.c b/nx/source/nvidia/cmds/3d.c
new file mode 100644
index 00000000..94b77fe7
--- /dev/null
+++ b/nx/source/nvidia/cmds/3d.c
@@ -0,0 +1,2 @@
+#include <switch.h>
+
diff --git a/nx/source/nvidia/cmds/common.c b/nx/source/nvidia/cmds/common.c
new file mode 100644
index 00000000..1423b447
--- /dev/null
+++ b/nx/source/nvidia/cmds/common.c
@@ -0,0 +1,10 @@
+#include <switch.h>
+#include <string.h>
+
+void nvCmdsFifoInit(NvCmdList* cmds) {
+    NvCmd(cmds, NvIncr(0, NvCmdCommon_BindObject, NvClassNumber_3D));
+    NvCmd(cmds, NvIncr(1, NvCmdCommon_BindObject, NvClassNumber_Compute));
+    NvCmd(cmds, NvIncr(2, NvCmdCommon_BindObject, NvClassNumber_Kepler));
+    NvCmd(cmds, NvIncr(3, NvCmdCommon_BindObject, NvClassNumber_2D));
+    NvCmd(cmds, NvIncr(4, NvCmdCommon_BindObject, NvClassNumber_DMA));
+}