diff --git a/nx/include/switch.h b/nx/include/switch.h
index 2181d9ee..db30bdc4 100644
--- a/nx/include/switch.h
+++ b/nx/include/switch.h
@@ -72,6 +72,7 @@ extern "C" {
 #include "switch/nvidia/cmds/common.h"
 #include "switch/nvidia/cmds/3d.h"
 #include "switch/nvidia/cmds/3d_init.h"
+#include "switch/nvidia/cmds/3d_rendertarget.h"
 #include "switch/nvidia/cmds/3d_clear.h"
 
 #include "switch/runtime/env.h"
diff --git a/nx/include/switch/nvidia/cmds/3d.h b/nx/include/switch/nvidia/cmds/3d.h
index e573a161..899e50b3 100644
--- a/nx/include/switch/nvidia/cmds/3d.h
+++ b/nx/include/switch/nvidia/cmds/3d.h
@@ -95,6 +95,9 @@ enum {
 #define NvReg3D_ViewportSubpixelPrecisionBias(n) \
     (NvReg3D_ViewportNSubpixelPrecisionBias + 8*(n))
 
+#define NvReg3D_RenderTargetAddr(n) \
+    (NvReg3D_RenderTargetNAddr + 16*(n))
+
 #define NvReg3D_ViewportHorizontal(n) \
     (NvReg3D_ViewportNHorizontal + 4*(n))
 #define NvReg3D_ViewportVertical(n) \
diff --git a/nx/include/switch/nvidia/cmds/3d_rendertarget.h b/nx/include/switch/nvidia/cmds/3d_rendertarget.h
new file mode 100644
index 00000000..44dad0fa
--- /dev/null
+++ b/nx/include/switch/nvidia/cmds/3d_rendertarget.h
@@ -0,0 +1,21 @@
+typedef struct {
+    NvBuffer* color_buffer;
+    size_t width;
+    size_t height;
+    NvBufferKind format;
+} VnRenderTargetConfig;
+
+void vnRenderTargetSetColorBuffer(VnRenderTargetConfig* c, NvBuffer* buffer) {
+    c->color_buffer = buffer;
+}
+
+void vnRenderTargetSetDimensions(VnRenderTargetConfig* c, size_t width, size_t height) {
+    c->width = width;
+    c->height = height;
+}
+
+void vnRenderTargetSetFormat(VnRenderTargetConfig* c, NvBufferKind format) {
+    c->format = format;
+}
+
+void vnSetRenderTargets(Vn* vn, VnRenderTargetConfig* targets, size_t num_targets);
diff --git a/nx/source/nvidia/cmds/3d_clear.c b/nx/source/nvidia/cmds/3d_clear.c
index 3f608447..1adf5cb5 100644
--- a/nx/source/nvidia/cmds/3d_clear.c
+++ b/nx/source/nvidia/cmds/3d_clear.c
@@ -9,7 +9,6 @@ void vnClearBuffer(
           NvIncr(0, NvReg3D_ScreenScissorHorizontal, 0 | (width << 16), 0 | (height << 16)),
           NvIncr(0, NvReg3D_RenderTargetControl, (076543210 << 4) | 1)); // bit0 probably enables RT #0
 
-    // TODO: this function does not seem to update buffer, but when i give it an invalid gpu_addr i get a gpfifo error so at least something is going on
     iova_t gpu_addr = nvBufferGetGpuAddr(buf);
     VnCmd(vn,
           NvIncr(0, NvReg3D_RenderTargetNAddr + 0x10*0,
diff --git a/nx/source/nvidia/cmds/3d_init.c b/nx/source/nvidia/cmds/3d_init.c
index 983b42bf..27756796 100644
--- a/nx/source/nvidia/cmds/3d_init.c
+++ b/nx/source/nvidia/cmds/3d_init.c
@@ -78,7 +78,7 @@ Result vnInit3D(Vn* vn) {
         vn,
         NvImm(3, 0xab, 3), // SetOperation?
         NvImm(3, 0xa4, 0), // SetClipEnable
-        NvImm(3, 0x221, 0x3f));
+        NvImm(3, 0x221, 0x3f)
         );
 
     // TODO: Call macro_14f(0x00418800, 1, 1).
diff --git a/nx/source/nvidia/cmds/3d_rendertarget.c b/nx/source/nvidia/cmds/3d_rendertarget.c
new file mode 100644
index 00000000..0d3b4976
--- /dev/null
+++ b/nx/source/nvidia/cmds/3d_rendertarget.c
@@ -0,0 +1,27 @@
+#include <switch.h>
+#include <string.h>
+
+void vnSetRenderTargets(Vn* vn, VnRenderTargetConfig* targets, size_t num_targets) {
+    size_t i;
+
+    VnCmd(vn, NvIncr(0, NvReg3D_RenderTargetControl, (076543210 << 4) | num_targets));
+
+    for (i=0; i<num_targets; i++) {
+        iova_t gpu_addr = nvBufferGetGpuAddr(targets[i].color_buffer);
+
+        VnCmd(
+            vn,
+            NvIncr(0,
+                NvReg3D_RenderTargetAddr(i),
+                gpu_addr >> 32,
+                gpu_addr,
+                targets[i].width,
+                targets[i].height,
+                targets[i].format,
+                0,
+                0,
+                targets[i].width, // TODO: Round up to power of 2?
+                0
+        ));
+    }
+}