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https://github.com/switchbrew/libnx.git
synced 2025-07-04 10:32:15 +02:00
Done with outlining the GPU init, also introduced Vn object
This commit is contained in:
plutooo
parent
5ea56defc4
commit
34a35bab27
@ -1,4 +1,5 @@
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enum {
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NvReg3D_MmeShadowRamControl = 0x49,
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NvReg3D_LineWidthSeparate = 0x83,
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NvReg3D_LocalBase = 0x1df,
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NvReg3D_RenderTargetNAddr = 0x200,
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@ -9,7 +10,6 @@ enum {
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NvReg3D_RenderTargetNArrayMode = 0x206,
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NvReg3D_RenderTargetNLayerStride = 0x207,
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NvReg3D_RenderTargetNBaseLayer = 0x208,
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NvReg3D_ViewportNScaleX = 0x280,
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NvReg3D_ViewportNScaleY = 0x281,
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NvReg3D_ViewportNScaleZ = 0x282,
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@ -18,12 +18,10 @@ enum {
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NvReg3D_ViewportNTranslateZ = 0x285,
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NvReg3D_ViewportNSwizzles = 0x286,
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NvReg3D_ViewportNSubpixelPrecisionBias = 0x287,
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NvReg3D_ViewportNHorizontal= 0x300,
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NvReg3D_ViewportNVertical= 0x301,
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NvReg3D_ViewportNDepthRangeNear= 0x302,
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NvReg3D_ViewportNDepthRangeFar= 0x303,
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NvReg3D_ClipRectNHorizontal = 0x340,
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NvReg3D_ClipRectNVertical = 0x341,
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NvReg3D_CallLimitLog = 0x359,
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@ -33,14 +31,23 @@ enum {
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NvReg3D_ScissorNHorizontal = 0x381,
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NvReg3D_ScissorNVertical = 0x382,
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NvReg3D_VertexRunoutAddr = 0x3e1,
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NvReg3D_MultisampleRasterEnable = 0x3ed,
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NvReg3D_MsaaMask = 0x3ef,
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NvReg3D_CoverageModulationEnable = 0x3f6,
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NvReg3D_ScreenScissorHorizontal = 0x3fd,
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NvReg3D_ScreenScissorVertical = 0x3fe,
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NvReg3D_ClearFlags = 0x43e,
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NvReg3D_ConservativeRaster = 0x452,
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NvReg3D_MultisampleCoverageToColor = 0x47e,
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NvReg3D_RenderTargetControl = 0x487,
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NvReg3D_ZetaArrayMode = 0x48c,
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NvReg3D_LinkedTsc = 0x48d,
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NvReg3D_BlendIndependent = 0x4b9,
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NvReg3D_ScreenHorizontalControl = 0x4be,
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NvReg3D_ClipDistanceEnable = 0x544,
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NvReg3D_SampleCountEnable = 0x545,
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NvReg3D_ZcullStatCtrsEnable = 0x547,
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NvReg3D_PointSpriteEnable = 0x548,
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NvReg3D_MultisampleEnable = 0x54d,
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NvReg3D_MultisampleControl = 0x54f,
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NvReg3D_ZcullRegion = 0x564,
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@ -49,10 +56,14 @@ enum {
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NvReg3D_Layer = 0x573,
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NvReg3D_MultisampleMode = 0x574,
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NvReg3D_EdgeFlag = 0x579,
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NvReg3D_PointCoordReplace = 0x581,
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NvReg3D_CodeAddr = 0x582,
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NvReg3D_VertexIdGenMode = 0x593,
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NvReg3D_PointRasterRules = 0x597,
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NvReg3D_ProvokingVertexLast = 0x5a1,
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NvReg3D_IndexArrayLimit = 0x5f4,
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NvReg3D_VertexStreamNEnableDivisor = 0x620,
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NvReg3D_VpPointSize = 0x644,
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NvReg3D_ZcullTestMask = 0x65b,
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NvReg3D_ClearBufferTrigger = 0x674,
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NvReg3D_ViewportTransformEnable = 0x64b,
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@ -61,7 +72,7 @@ enum {
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NvReg3D_ConstantBufferSize = 0x8e0,
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NvReg3D_ConstantBufferAddr = 0x8e1,
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NvReg3D_ConstantBufferLoadOffset = 0x8e3,
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NvReg3D_ConstantBufferBufferN = 0x8e3,
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NvReg3D_ConstantBufferLoadN = 0x8e3,
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NvReg3D_TextureConstantBufferIndex = 0x982,
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NvReg3D_ConstantBufferBindN = 0x904,
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NvReg3D_MmeShadowScratchN = 0xd00,
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@ -100,6 +111,10 @@ enum {
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#define NvReg3D_ScissorEnable(n) \
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(NvReg3D_ScissorNEnable + 4*(n))
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#define NvReg3D_ScissorHorizontal(n) \
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(NvReg3D_ScissorNHorizontal + 4*(n))
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#define NvReg3D_ScissorVertical(n) \
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(NvReg3D_ScissorNVertical + 4*(n))
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#define NvReg3D_VertexStreamEnableDivisor(n) \
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(NvReg3D_VertexStreamNEnableDivisor + (n))
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11
nx/include/switch/nvidia/cmds/vn.h
Normal file
11
nx/include/switch/nvidia/cmds/vn.h
Normal file
@ -0,0 +1,11 @@
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typedef struct {
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NvGpu* parent;
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NvCmdList cmd_list;
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NvBuffer vertex_runout;
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NvBuffer const_buffer0;
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NvBuffer const_buffer1;
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} Vn;
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#define VnCmd(vn, ...) \
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NvCmd(&(vn)->cmd_list, __VA_ARGS__)
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@ -8,7 +8,7 @@ Result vnInit3D(Vn* vn) {
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// ???
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NvIncr(0, NvReg3D_MmeShadowScratch(0x1A), 0, 0xffffffff),
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NvImm(0, NvReg3D_MmeShadowScratch(0x19), 0),
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// Reset multisampling
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//
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NvImm(0, NvReg3D_MultisampleEnable, 0),
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NvImm(0, NvReg3D_MultisampleCsaaEnable, 0),
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NvImm(0, NvReg3D_MultisampleMode, 0),
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@ -178,5 +178,147 @@ Result vnInit3D(Vn* vn) {
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VnCmd(vn, NvImm(0, NvReg3D_ScreenHorizontalControl, 0x10));
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// Reset all the scissors.
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for (i=0; i<16; i++) {
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VnCmd(vn,
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NvIncr(0, NvReg3D_ScissorHorizontal(i),
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(0xffff << 16) | 0, /* Horizontal */
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(0xffff << 16) | 0 /* Vertical */
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)
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);
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}
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// Setup RAM for macros.
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VnCmd(vn,
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NvImm(0, NvReg3D_MmeShadowRamControl, 1),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x1c),
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0xffffffff)
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);
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// Reset IndexArrayLimit.
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VnCmd(vn,
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NvIncr(0, NvReg3D_IndexArrayLimit, 0xFF, 0xFFFFFFFF),
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NvImm(0, NvReg3D_PrimRestartWithDrawArrays, 0)
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);
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// More RAM setup.
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VnCmd(vn,
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2a), 0x0500055f),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2b), 0x05000561),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2c), 0x05000563),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2d), 0x05000565),
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NvIncr(0, NvReg3D_MmeShadowScratch(0x2e), 0x05000567),
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NvImm(0, NvReg3D_MmeShadowScratch(0x2f), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x30), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x31), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x32), 0x200),
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NvImm(0, NvReg3D_MmeShadowScratch(0x33), 0x200)
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);
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VnCmd(vn,
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NvIncr(0, NvReg3D_SampleCountEnable, 1),
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NvIncr(0, NvReg3D_ClipDistanceEnable, 0xff),
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NvIncr(0, NvReg3D_MsaaMask, 0xffff, 0xffff, 0xffff, 0xffff),
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NvImm(0, 0x367, 0),
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NvImm(0, NvReg3D_PointSpriteEnable, 1),
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NvImm(0, NvReg3D_PointCoordReplace, 4),
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NvImm(0, NvReg3D_VpPointSize, 1),
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NvImm(0, 0x68b, 0),
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NvImm(0, NvReg3D_StencilTwoSideEnable, 1),
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NvImm(0, 0xe2a, 0x184)
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);
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// TODO: Call macro_206(0x184);
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VnCmd(vn, NvIncr(0, NvReg3D_ConstantBufferLoadN, 0x44fffe00));
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VnCmd(vn,
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NvImm(0, NvReg3D_ZetaArrayMode, 1),
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NvImm(0, NvReg3D_ConservativeRaster, 0),
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);
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// TODO: Call macro_14f(0x00418800, 0, 0x01800000);
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VnCmd(vn,
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NvImm(0, NvReg3D_MmeShadowScratch(0x34), 0),
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NvImm(0, 0xbb, 0),
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NvImm(0, NvReg3D_MultisampleRasterEnable, 0),
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NvImm(0, NvReg3D_CoverageModulationEnable, 0),
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NvImm(0, 0x44c, 0x13),
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NvImm(0, NvReg3D_MultisampleCoverageToColor, 0)
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);
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VnCmd(vn, NvIncr(0, NvReg3D_CodeAddr, 4, 0x00000000));
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VnCmd(vn,
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NvImm(0, NvReg3D_MmeShadowScratch(0x27), 0x230),
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NvImm(0, NvReg3D_MmeShadowScratch(0x23), 0x430),
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NvImm(0, 0x5ad, 0)
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);
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// TODO: Call macro_14f(0x00418e40, 7, 0xf);
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// TODO: Call macro_14f(0x00418e58, 0x842, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x70, 0xf0);
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// TODO: Call macro_14f(0x00418e58, 0x04f10000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e40, 0x700, 0xf00);
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// TODO: Call macro_14f(0x00418e5c, 0x53, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x7000, 0xf000);
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// TODO: Call macro_14f(0x00418e5c, 0xe90000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e40, 0x70000, 0xf0000);
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// TODO: Call macro_14f(0x00418e60, 0xea, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x700000, 0xf00000);
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// TODO: Call macro_14f(0x00418e60, 0x00eb0000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e40, 0x07000000, 0x0f000000);
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// TODO: Call macro_14f(0x00418e64, 0x208, 0xffff);
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// TODO: Call macro_14f(0x00418e40, 0x70000000, 0xf0000000);
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// TODO: Call macro_14f(0x00418e64, 0x02090000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e44, 7, 0xf);
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// TODO: Call macro_14f(0x00418e68, 0x20a, 0xffff);
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// TODO: Call macro_14f(0x00418e44, 0x70, 0xf0);
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// TODO: Call macro_14f(0x00418e68, 0x020b0000, 0xffff0000);
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// TODO: Call macro_14f(0x00418e44, 0x700, 0xf00);
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// TODO: Call macro_14f(0x00418e6c, 0x644, 0xffff);
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// Setting up TiledCache and other stuff.
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VnCmd(vn,
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NvImm(0, 0x3d8, 0),
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NvIncr(0, 0x3d9, 0x00800080),
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NvIncr(0, 0x3da, 0x1109),
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NvIncr(0, 0x3db, 0x08080202),
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NvImm(0, 0x442, 0x1f),
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NvIncr(0, 0x3dc, 0x00080001),
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NvImm(0, 0x44d, 0),
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);
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// TODO: Subchannel 1:
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/*
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NvImm(0, 0x54a, 0),
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NvImm(0, 0x982, 2),
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NvIncr(0, NvReg3D_LocalBase, 0x01000000),
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NvIncr(0, 0x85, 0x03000000),
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NvIncr(0, NvReg3D_CodeAddr, 4, 0x00000000),
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NvImm(0xc4, 0x503),
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*/
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// TODO: Subchannel 6:
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/*
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2001c00b type: 1, subchannel: 6
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UNKNOWN (0x00b) <- 0x80000000
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2001c00b type: 1, subchannel: 6
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UNKNOWN (0x00b) <- 0x70000000
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*/
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// Flush texture info cache.
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VnCmd(vn,
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NvImm(0, 0x4a2, 0),
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NvImm(0, 0x369, 0x11),
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NvImm(0, 0x50a, 0),
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NvImm(0, 0x509, 0)
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);
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VnCmd(vn,
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NvIncr(0, 0x1e9, 0x7ff8),
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NvIncr(0, 0x1ea, 0x7ffc)
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);
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return 0;
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}
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