From 22499d8ddf3c516002e82fe68f72f2ebf8f10b0b Mon Sep 17 00:00:00 2001
From: fincs <fincs.alt1@gmail.com>
Date: Wed, 31 Oct 2018 16:26:06 +0100
Subject: [PATCH] nvhost-as-gpu.c: fix some mistakes, add
 nvioctlNvhostAsGpu_FreeSpace, add NvAllocSpaceFlags, add
 NvMapBufferFlags_Modify

---
 nx/include/switch/nvidia/ioctl.h       | 12 ++++++++++--
 nx/source/nvidia/ioctl/nvhost-as-gpu.c | 25 ++++++++++++++++++++-----
 2 files changed, 30 insertions(+), 7 deletions(-)

diff --git a/nx/include/switch/nvidia/ioctl.h b/nx/include/switch/nvidia/ioctl.h
index 1ffe623b..0506eb49 100644
--- a/nx/include/switch/nvidia/ioctl.h
+++ b/nx/include/switch/nvidia/ioctl.h
@@ -131,10 +131,17 @@ typedef enum {
     NvZcullConfig_PartOfRegularBuffer = 3
 } NvZcullConfig;
 
+// Used with nvioctlNvhostAsGpu_AllocSpace().
+typedef enum {
+    NvAllocSpaceFlags_FixedOffset = 1,
+    NvAllocSpaceFlags_Sparse = 2,
+} NvAllocSpaceFlags;
+
 // Used with nvioctlNvhostAsGpu_MapBufferEx().
 typedef enum {
     NvMapBufferFlags_FixedOffset = 1,
     NvMapBufferFlags_IsCacheable = 4,
+    NvMapBufferFlags_Modify = 0x100,
 } NvMapBufferFlags;
 
 typedef enum {
@@ -171,11 +178,12 @@ Result nvioctlNvhostCtrlGpu_GetTpcMasks(u32 fd, u32 inval, u32 out[24>>2]);
 Result nvioctlNvhostCtrlGpu_GetL2State(u32 fd, nvioctl_l2_state *out);
 
 Result nvioctlNvhostAsGpu_BindChannel(u32 fd, u32 channel_fd);
-Result nvioctlNvhostAsGpu_AllocSpace(u32 fd, u32 pages, u32 page_size, u32 flags, u64 align, u64 *offset);
+Result nvioctlNvhostAsGpu_AllocSpace(u32 fd, u32 pages, u32 page_size, u32 flags, u64 align_or_offset, u64 *offset);
+Result nvioctlNvhostAsGpu_FreeSpace(u32 fd, u64 offset, u32 pages, u32 page_size);
 Result nvioctlNvhostAsGpu_MapBufferEx(u32 fd, u32 flags, u32 kind, u32 nvmap_handle, u32 page_size, u64 buffer_offset, u64 mapping_size, u64 input_offset, u64 *offset);
 Result nvioctlNvhostAsGpu_UnmapBuffer(u32 fd, u64 offset);
 Result nvioctlNvhostAsGpu_GetVARegions(u32 fd, nvioctl_va_region regions[2]);
-Result nvioctlNvhostAsGpu_InitializeEx(u32 fd, u32 big_page_size, u32 flags);
+Result nvioctlNvhostAsGpu_InitializeEx(u32 fd, u32 flags, u32 big_page_size);
 
 Result nvioctlNvmap_Create(u32 fd, u32 size, u32 *nvmap_handle);
 Result nvioctlNvmap_FromId(u32 fd, u32 id, u32 *nvmap_handle);
diff --git a/nx/source/nvidia/ioctl/nvhost-as-gpu.c b/nx/source/nvidia/ioctl/nvhost-as-gpu.c
index d1f0bc7e..97aad4c1 100644
--- a/nx/source/nvidia/ioctl/nvhost-as-gpu.c
+++ b/nx/source/nvidia/ioctl/nvhost-as-gpu.c
@@ -21,7 +21,7 @@ Result nvioctlNvhostAsGpu_AllocSpace(u32 fd, u32 pages, u32 page_size, u32 flags
     struct {
         __nv_in u32 pages;
         __nv_in u32 page_size;
-        __nv_in u32 flags;
+        __nv_in u32 flags; // bit0=fixed bit1=sparse
         u32      pad;
         union {
             __nv_out u64 offset;
@@ -44,6 +44,21 @@ Result nvioctlNvhostAsGpu_AllocSpace(u32 fd, u32 pages, u32 page_size, u32 flags
     return rc;
 }
 
+Result nvioctlNvhostAsGpu_FreeSpace(u32 fd, u64 offset, u32 pages, u32 page_size) {
+    struct {
+        __nv_in u64 offset;
+        __nv_in u32 pages;
+        __nv_in u32 page_size;
+    } data;
+
+    memset(&data, 0, sizeof(data));
+    data.offset = offset;
+    data.pages = pages;
+    data.page_size = page_size;
+
+    return nvIoctl(fd, _NV_IOWR(0x41, 0x03, data), &data);
+}
+
 Result nvioctlNvhostAsGpu_MapBufferEx(
     u32 fd, u32 flags, u32 kind, u32 nvmap_handle, u32 page_size,
     u64 buffer_offset, u64 mapping_size, u64 input_offset, u64 *offset)
@@ -111,11 +126,11 @@ Result nvioctlNvhostAsGpu_GetVARegions(u32 fd, nvioctl_va_region regions[2]) {
     return rc;
 }
 
-Result nvioctlNvhostAsGpu_InitializeEx(u32 fd, u32 big_page_size, u32 flags) {
+Result nvioctlNvhostAsGpu_InitializeEx(u32 fd, u32 flags, u32 big_page_size) {
     struct {
-        __nv_in u32 big_page_size;   // depends on GPU's available_big_page_sizes; 0=default
+        __nv_in u32 flags;           // flags? passes 1
         __nv_in s32 as_fd;           // ignored; passes 0
-        __nv_in u32 flags;           // ignored; passes 0
+        __nv_in u32 big_page_size;   // depends on GPU's available_big_page_sizes; 0=default
         __nv_in u32 reserved;        // ignored; passes 0
         __nv_in u64 unk0;
         __nv_in u64 unk1;
@@ -123,8 +138,8 @@ Result nvioctlNvhostAsGpu_InitializeEx(u32 fd, u32 big_page_size, u32 flags) {
     } data;
 
     memset(&data, 0, sizeof(data));
-    data.big_page_size = big_page_size;
     data.flags = flags;
+    data.big_page_size = big_page_size;
 
     return nvIoctl(fd, _NV_IOW(0x41, 0x09, data), &data);
 }