From 165bd8935f3069bb38ae56930960389b8139dfd2 Mon Sep 17 00:00:00 2001
From: plutooo <plutooo@users.noreply.github.com>
Date: Sun, 1 Apr 2018 04:39:11 +0200
Subject: [PATCH] Structuring

---
 nx/include/switch/nvidia/cmds/3d.h        |  2 --
 nx/include/switch/nvidia/cmds/3d_clear.h  |  1 +
 nx/include/switch/nvidia/cmds/3d_init.h   |  0
 nx/include/switch/nvidia/cmds/common.h    |  4 +--
 nx/source/nvidia/cmds/3d_clear.c          | 32 ++++++++++++++++++++++
 nx/source/nvidia/cmds/{3d.c => 3d_init.c} | 33 +----------------------
 nx/source/nvidia/cmds/common.c            |  2 +-
 7 files changed, 37 insertions(+), 37 deletions(-)
 create mode 100644 nx/include/switch/nvidia/cmds/3d_clear.h
 create mode 100644 nx/include/switch/nvidia/cmds/3d_init.h
 create mode 100644 nx/source/nvidia/cmds/3d_clear.c
 rename nx/source/nvidia/cmds/{3d.c => 3d_init.c} (73%)

diff --git a/nx/include/switch/nvidia/cmds/3d.h b/nx/include/switch/nvidia/cmds/3d.h
index 6f7abf24..998c4e98 100644
--- a/nx/include/switch/nvidia/cmds/3d.h
+++ b/nx/include/switch/nvidia/cmds/3d.h
@@ -50,5 +50,3 @@ enum {
 
 #define NvReg3D_VertexStreamEnableDivisor(n) \
     ((NvReg3D_VertexStreamNEnableDivisor) + (n))
-
-void nvCmdsClearColor(NvCmdList* cmds, float colors[4]);
diff --git a/nx/include/switch/nvidia/cmds/3d_clear.h b/nx/include/switch/nvidia/cmds/3d_clear.h
new file mode 100644
index 00000000..b4ad8b29
--- /dev/null
+++ b/nx/include/switch/nvidia/cmds/3d_clear.h
@@ -0,0 +1 @@
+void nvCmdsClearColor(NvCmdList* cmds, float colors[4]);
diff --git a/nx/include/switch/nvidia/cmds/3d_init.h b/nx/include/switch/nvidia/cmds/3d_init.h
new file mode 100644
index 00000000..e69de29b
diff --git a/nx/include/switch/nvidia/cmds/common.h b/nx/include/switch/nvidia/cmds/common.h
index 8dea281e..39c3851d 100644
--- a/nx/include/switch/nvidia/cmds/common.h
+++ b/nx/include/switch/nvidia/cmds/common.h
@@ -1,5 +1,5 @@
-void nvCmdsFifoInit(NvCmdList* cmds);
-
 enum {
     NvCmdCommon_BindObject = 0
 };
+
+void nvCmdsInit(NvCmdList* cmds);
diff --git a/nx/source/nvidia/cmds/3d_clear.c b/nx/source/nvidia/cmds/3d_clear.c
new file mode 100644
index 00000000..a2e0994c
--- /dev/null
+++ b/nx/source/nvidia/cmds/3d_clear.c
@@ -0,0 +1,32 @@
+#include <switch.h>
+#include <string.h>
+
+void nvCmdsClearBuffer(
+    NvCmdList* cmds, NvBuffer* buf, u32 width, u32 height, float colors[4])
+{
+    NvCmd(cmds, NvIncr(0, NvReg3D_ClearColor,
+        f2i(colors[0]), f2i(colors[1]), f2i(colors[2]), f2i(colors[3])));
+    NvCmd(cmds, NvIncr(0, NvReg3D_ScreenScissorHorizontal,
+        0 | (0x100 << 16), 0 | (0x100 << 16)));
+    NvCmd(cmds, NvImm(0, NvReg3D_RenderTargetControl, 1)); // bit0 probably enables RT #0
+
+    iova_t gpu_addr = nvBufferGetGpuAddr(buf);
+    NvCmd(cmds,
+        NvIncr(NvReg3D_RenderTargetNAddr + 0x10*0,
+            gpu_addr >> 32, gpu_addr,
+            width, height,
+            0 /* Format */,
+            0x1000 /* TileMode */,
+            1 /* ArrayMode */,
+            0 /* Stride */,
+            0 /* BaseLayer */
+        ));
+    int z;
+    for (z=0; z<32; z++)
+        NvCmd(cmds, NvImm(0, NvReg3D_ClearBufferTrigger, 0x3c | (z << 10)));
+    /*
+      TODO:
+    IMMED_NVC0(push, NVC0_3D(ZETA_ENABLE), 0);
+    IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), 0);
+    */    
+}
diff --git a/nx/source/nvidia/cmds/3d.c b/nx/source/nvidia/cmds/3d_init.c
similarity index 73%
rename from nx/source/nvidia/cmds/3d.c
rename to nx/source/nvidia/cmds/3d_init.c
index e0cabd73..fe488c02 100644
--- a/nx/source/nvidia/cmds/3d.c
+++ b/nx/source/nvidia/cmds/3d_init.c
@@ -1,7 +1,7 @@
 #include <switch.h>
 #include <string.h>
 
-void nvCmds3DInitialize(NvCmdList* cmds) {
+void nvCmdsInit3D(NvCmdList* cmds) {
     NvCmd(
         cmds,
         // ???
@@ -99,34 +99,3 @@ void nvCmds3DInitialize(NvCmdList* cmds) {
 
     // TODO: CB_BIND stuff
 }
-
-void nvCmdsClearBuffer(
-    NvCmdList* cmds, NvBuffer* buf, u32 width, u32 height, float colors[4])
-{
-    NvCmd(cmds, NvIncr(0, NvReg3D_ClearColor,
-        f2i(colors[0]), f2i(colors[1]), f2i(colors[2]), f2i(colors[3])));
-    NvCmd(cmds, NvIncr(0, NvReg3D_ScreenScissorHorizontal,
-        0 | (0x100 << 16), 0 | (0x100 << 16)));
-    NvCmd(cmds, NvImm(0, NvReg3D_RenderTargetControl, 1)); // bit0 probably enables RT #0
-
-    iova_t gpu_addr = nvBufferGetGpuAddr(buf);
-    NvCmd(cmds,
-        NvIncr(NvReg3D_RenderTargetNAddr + 0x10*0,
-            gpu_addr >> 32, gpu_addr,
-            width, height,
-            0 /* Format */,
-            0x1000 /* TileMode */,
-            1 /* ArrayMode */,
-            0 /* Stride */,
-            0 /* BaseLayer */
-        ));
-    int z;
-    for (z=0; z<32; z++)
-        NvCmd(cmds, NvImm(0, NvReg3D_ClearBufferTrigger, 0x3c | (z << 10)));
-    /*
-      TODO:
-    IMMED_NVC0(push, NVC0_3D(ZETA_ENABLE), 0);
-    IMMED_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), 0);
-    */
-    
-}
diff --git a/nx/source/nvidia/cmds/common.c b/nx/source/nvidia/cmds/common.c
index dafbad10..2578a0e9 100644
--- a/nx/source/nvidia/cmds/common.c
+++ b/nx/source/nvidia/cmds/common.c
@@ -1,7 +1,7 @@
 #include <switch.h>
 #include <string.h>
 
-void nvCmdsFifoInit(NvCmdList* cmds) {
+void nvCmdsInit(NvCmdList* cmds) {
     NvCmd(cmds,
         NvIncr(0, NvCmdCommon_BindObject, NvClassNumber_3D),
         NvIncr(1, NvCmdCommon_BindObject, NvClassNumber_Compute),