mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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119 lines
3.8 KiB
C++
119 lines
3.8 KiB
C++
/*
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* Copyright (c) 2019-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "../defines.hpp"
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#include "hvisor_cpu_sysreg_general.hpp"
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namespace ams::hvisor::cpu {
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// FIXME GCC 10
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struct ExceptionSyndromeRegister {
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enum ExceptionClass : u32 {
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Uncategorized = 0x0,
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WFxTrap = 0x1,
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CP15RTTrap = 0x3,
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CP15RRTTrap = 0x4,
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CP14RTTrap = 0x5,
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CP14DTTrap = 0x6,
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AdvSIMDFPAccessTrap = 0x7,
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FPIDTrap = 0x8,
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PACTrap = 0x9,
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CP14RRTTrap = 0xC,
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BranchTargetException = 0xD, // No official enum field name from Arm yet
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IllegalState = 0xE,
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SupervisorCallA32 = 0x11,
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HypervisorCallA32 = 0x12,
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MonitorCallA32 = 0x13,
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SupervisorCallA64 = 0x15,
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HypervisorCallA64 = 0x16,
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MonitorCallA64 = 0x17,
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SystemRegisterTrap = 0x18,
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SVEAccessTrap = 0x19,
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ERetTrap = 0x1A,
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El3_ImplementationDefined = 0x1F,
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InstructionAbortLowerEl = 0x20,
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InstructionAbortSameEl = 0x21,
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PCAlignment = 0x22,
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DataAbortLowerEl = 0x24,
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DataAbortSameEl = 0x25,
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SPAlignment = 0x26,
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FPTrappedExceptionA32 = 0x28,
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FPTrappedExceptionA64 = 0x2C,
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SError = 0x2F,
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BreakpointLowerEl = 0x30,
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BreakpointSameEl = 0x31,
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SoftwareStepLowerEl = 0x32,
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SoftwareStepSameEl = 0x33,
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WatchpointLowerEl = 0x34,
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WatchpointSameEl = 0x35,
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SoftwareBreakpointA32 = 0x38,
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VectorCatchA32 = 0x3A,
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SoftwareBreakpointA64 = 0x3C,
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};
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u32 iss : 25; // Instruction Specific Syndrome
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u32 il : 1; // Instruction Length (16 or 32-bit)
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ExceptionClass ec : 6; // Exception Class
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u32 res0 : 32;
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constexpr size_t GetInstructionLength()
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{
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return il == 0 ? 2 : 4;
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}
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};
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struct DataAbortIss {
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u32 dfsc : 6; // Fault status code
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u32 wnr : 1; // Write, not Read
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u32 s1ptw : 1; // Stage1 page table walk fault
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u32 cm : 1; // Cache maintenance
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u32 ea : 1; // External abort
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u32 fnv : 1; // FAR not Valid
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u32 set : 2; // Synchronous error type
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u32 vncr : 1; // vncr_el2 trap
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u32 ar : 1; // Acquire/release. Bit 14
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u32 sf : 1; // 64-bit register used
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u32 srt : 5; // Syndrome register transfer (register used)
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u32 sse : 1; // Syndrome sign extend
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u32 sas : 2; // Syndrome access size. Bit 23
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u32 isv : 1; // Instruction syndrome valid (ISS[23:14] valid)
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constexpr bool HasValidFar()
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{
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return isv && !fnv;
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}
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constexpr size_t GetAccessSize()
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{
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return BITL(sas);
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}
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};
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static_assert(std::is_standard_layout_v<ExceptionSyndromeRegister>);
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static_assert(std::is_standard_layout_v<DataAbortIss>);
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static_assert(std::is_trivial_v<ExceptionSyndromeRegister>);
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static_assert(std::is_trivial_v<DataAbortIss>);
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}
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