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								 Michael Scire | 5f7308efd1 | Implement Clock/Reset Driver. | 2018-03-01 22:50:07 -08:00 |  | 
			
				
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								 TuxSH | cad9cdc6e0 | Reintroduce unmap_* in package2.c | 2018-03-02 07:33:47 +01:00 |  | 
			
				
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								 Michael Scire | 78bee60485 | Fix dangling comments | 2018-03-01 21:24:22 -08:00 |  | 
			
				
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								 Michael Scire | 7b6d15ec36 | Fix up package2.c, current build makes it to the panic() on hardware | 2018-03-01 21:15:19 -08:00 |  | 
			
				
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								 Michael Scire | 2390df4d07 | Fix start.s to pass reloc_list properly to package2ldr | 2018-03-01 20:39:49 -08:00 |  | 
			
				
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								 Michael Scire | 0a80a7caf5 | Fix coldboot init, Exosphere makes it to PK2LDR in this commit. | 2018-03-01 20:10:05 -08:00 |  | 
			
				
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								 TuxSH | 63d0b08ac4 | Rewrite relocation stuff | 2018-03-02 02:47:19 +01:00 |  | 
			
				
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								 TuxSH | 6903b20579 | Fix wrong subsection name | 2018-03-01 21:28:50 +01:00 |  | 
			
				
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								 TuxSH | 82f10b4320 | Implements missings parts of pk2ldr, refactor relocation a bit | 2018-03-01 19:11:09 +01:00 |  | 
			
				
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								 TuxSH | 568781bc7e | Strongly validate SPL's buffer address | 2018-03-01 12:35:02 +01:00 |  | 
			
				
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								 Michael Scire | 9553c69c8f | Properly detect PK21 master key rev. | 2018-03-01 03:28:34 -08:00 |  | 
			
				
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								 Michael Scire | 205d3b8b80 | Fix PK2LDR bugs, Fix SE bugs | 2018-03-01 03:25:12 -08:00 |  | 
			
				
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								 TuxSH | 7850d3fd57 | Put the loaded bootconfig in the evt page | 2018-03-01 11:06:55 +01:00 |  | 
			
				
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								 Michael Scire | b67ce08f84 | Fix Modulus Exponentiation in SE driver | 2018-03-01 02:00:39 -08:00 |  | 
			
				
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								 Michael Scire | 4025781f1c | Make clear_bss work regardless of load address | 2018-03-01 00:59:48 -08:00 |  | 
			
				
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								 TuxSH | 1d621f3bf4 | Fix tzram_map_all_segments | 2018-03-01 02:36:16 +01:00 |  | 
			
				
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								 TuxSH | 78b9698260 | Finish writing coldboot_main | 2018-03-01 01:40:09 +01:00 |  | 
			
				
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								 TuxSH | 19dda5ed48 | Can't copy to VAs if VA don't exist (at that point of the program) | 2018-03-01 01:13:10 +01:00 |  | 
			
				
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								 TuxSH | e34d86b16f | Fix the set_memory_registers_enable_mmu call | 2018-03-01 00:05:18 +01:00 |  | 
			
				
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								 TuxSH | 3d4dcdde13 | Fix ttbl init pointer arith bug, other fixes | 2018-02-28 23:35:30 +01:00 |  | 
			
				
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								 TuxSH | 0a89831193 | Clear bss at runtime like Nintendo actually does | 2018-02-28 22:29:17 +01:00 |  | 
			
				
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								 TuxSH | 303774aeb7 | Use bic instead of and in finalize_powerdown | 2018-02-28 20:01:42 +01:00 |  | 
			
				
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								 TuxSH | 6be5b0a52f | Implement flush_dcache_all_tzram_pa and invalidate_icache_all_inner_shareable_tzram_pa for the crt0s | 2018-02-28 19:06:41 +01:00 |  | 
			
				
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								 TuxSH | e5f293e004 | Implement and use set_memory_registers_enable_mmu | 2018-02-28 13:32:18 +01:00 |  | 
			
				
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								 TuxSH | 64c8612342 | Fix wrongly named register in __set_memory_registers, add prototype | 2018-02-28 07:32:14 +01:00 |  | 
			
				
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								 Michael Scire | c5b0639b8a | Implement BootConfig. | 2018-02-27 20:28:34 -08:00 |  | 
			
				
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								 Michael Scire | d0b74d7751 | Panic Bright Red on failed master key detection. | 2018-02-27 20:00:48 -08:00 |  | 
			
				
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								 Michael Scire | 694872b4cc | Fix decrypt_data_into_keyslot | 2018-02-27 19:59:51 -08:00 |  | 
			
				
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								 Michael Scire | 0508ee29d8 | Clean up SE TODOs, implement GIC nonsecure init | 2018-02-27 19:58:56 -08:00 |  | 
			
				
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								 Michael Scire | 1463266190 | Status callback keys have guaranteed atomicity from caller locks. | 2018-02-27 19:50:31 -08:00 |  | 
			
				
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								 Michael Scire | 66b3b3a706 | Implement Panic() stub. | 2018-02-27 19:43:07 -08:00 |  | 
			
				
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								 Michael Scire | fba3d1c2d9 | Finish implementing Security Engine context save | 2018-02-27 19:05:45 -08:00 |  | 
			
				
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								 Michael Scire | a8a2f8c3f6 | Implement more SE context save functionality | 2018-02-27 17:40:59 -08:00 |  | 
			
				
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								 TuxSH | 93634d08e3 | Implement __set_memory_registers | 2018-02-28 02:37:08 +01:00 |  | 
			
				
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								 Michael Scire | 924d469344 | Implement the rest of smcCpuSuspend with skeleton SE API calls. | 2018-02-27 17:07:30 -08:00 |  | 
			
				
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								 TuxSH | a90a431d61 | Refactor save/restore_current_core_context, fix memory ordering issue with inline asm | 2018-02-28 01:59:50 +01:00 |  | 
			
				
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								 Michael Scire | c18af9f3d2 | Finish smcCpuOff | 2018-02-27 16:35:35 -08:00 |  | 
			
				
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								 Michael Scire | 7a9e031bff | Uncomment more sleep/suspend code | 2018-02-27 16:10:51 -08:00 |  | 
			
				
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								 Michael Scire | 235b7b65e1 | Uncomment BPMP firmware copy in LP0 | 2018-02-27 16:01:09 -08:00 |  | 
			
				
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								 Michael Scire | c2c6745f60 | Implement save/restore current core context | 2018-02-27 15:40:05 -08:00 |  | 
			
				
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								 Michael Scire | 9a5bc05259 | Fix missing titlekey revision assignment | 2018-02-27 15:14:23 -08:00 |  | 
			
				
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								 TuxSH | 602507ee8f | Rename cache.s/.h to arm.s/.h | 2018-02-27 22:29:47 +01:00 |  | 
			
				
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								 TuxSH | 5bade9ee1c | Use specs file, remove -nostartfiles | 2018-02-27 20:14:12 +01:00 |  | 
			
				
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								 TuxSH | 0258324872 | Use provided __libc_init_array and __libc_fini_array, bugfixes | 2018-02-27 16:10:56 +01:00 |  | 
			
				
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								 TuxSH | 24b15dad40 | Unstub lma2vma code | 2018-02-27 13:26:51 +01:00 |  | 
			
				
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								 TuxSH | b0cb819b06 | Add proper linkscript... ...adapted from @fincs' own linkscripts | 2018-02-27 04:19:38 +01:00 |  | 
			
				
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								 Michael Scire | c4789a5a11 | Skeleton smcCpuOff, fix building, fix smcConfigureCarveout | 2018-02-26 17:41:31 -08:00 |  | 
			
				
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								 TuxSH | 23e9a8369a | Fix Makefile | 2018-02-27 01:00:58 +01:00 |  | 
			
				
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								 TuxSH | 9384546753 | Adapt code to match last commit, link in bpmpfw_bin(_size) | 2018-02-26 22:30:51 +01:00 |  | 
			
				
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								 TuxSH | 984ade3ede | Merge pull request #58 from MerryMage/context_id-rename Rename set_core_entrypoint_and_context_id | 2018-02-26 22:26:46 +01:00 |  |