From c2cef3670200d7faefed1f8b56efa60d8615faa1 Mon Sep 17 00:00:00 2001
From: tomvita <68505331+tomvita@users.noreply.github.com>
Date: Mon, 6 Jan 2025 18:09:28 +0800
Subject: [PATCH] implement code type 0xC4

---
 .../dmnt/source/cheat/impl/dmnt_cheat_vm.cpp  | 27 ++++++++++++++++---
 .../dmnt/source/cheat/impl/dmnt_cheat_vm.hpp  |  7 +++++
 2 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.cpp b/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.cpp
index b3df0c757..9576b465f 100644
--- a/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.cpp
+++ b/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.cpp
@@ -158,6 +158,11 @@ namespace ams::dmnt::cheat::impl {
                 this->LogToDebugFile("Opcode: Begin Keypress Conditional\n");
                 this->LogToDebugFile("Key Mask:  %x\n", opcode->begin_keypress_cond.key_mask);
                 break;
+            case CheatVmOpcodeType_BeginExtendedKeypressConditionalBlock:
+                this->LogToDebugFile("Opcode: Begin Extended Keypress Conditional\n");
+                this->LogToDebugFile("Key Mask:  %x\n", opcode->begin_ext_keypress_cond.key_mask);
+                this->LogToDebugFile("Auto Repeat:  %d\n", opcode->begin_ext_keypress_cond.auto_repeat);
+                break;
             case CheatVmOpcodeType_PerformArithmeticRegister:
                 this->LogToDebugFile("Opcode: Perform Register Arithmetic\n");
                 this->LogToDebugFile("Bit Width: %x\n", opcode->perform_math_reg.bit_width);
@@ -365,6 +370,7 @@ namespace ams::dmnt::cheat::impl {
         switch (opcode.opcode) {
             case CheatVmOpcodeType_BeginConditionalBlock:
             case CheatVmOpcodeType_BeginKeypressConditionalBlock:
+            case CheatVmOpcodeType_BeginExtendedKeypressConditionalBlock:
             case CheatVmOpcodeType_BeginRegisterConditionalBlock:
                 opcode.begin_conditional_block = true;
                 break;
@@ -468,6 +474,14 @@ namespace ams::dmnt::cheat::impl {
                     opcode.begin_keypress_cond.key_mask = first_dword & 0x0FFFFFFF;
                 }
                 break;
+            case CheatVmOpcodeType_BeginExtendedKeypressConditionalBlock:
+                {
+                    /* C4r000kk kkkkkkkk */
+                    /* Read additional words. */
+                    opcode.begin_ext_keypress_cond.key_mask = (((u64)first_dword & 0xFF) << 32ul) | ((u64)GetNextDword());
+                    opcode.begin_ext_keypress_cond.auto_repeat = ((first_dword >> 20) & 0xF) != 0;
+                }
+                break;
             case CheatVmOpcodeType_PerformArithmeticRegister:
                 {
                     /* 9TCRSIs0 (VVVVVVVV (VVVVVVVV)) */
@@ -999,12 +1013,19 @@ namespace ams::dmnt::cheat::impl {
                     break;
                 case CheatVmOpcodeType_BeginKeypressConditionalBlock:
                     /* Check for keypress. */
-                    if (cur_opcode.begin_keypress_cond.key_mask > 0x8000000) {
-                        if ((cur_opcode.begin_keypress_cond.key_mask & 0x7FFFFFF & kHeld) != (cur_opcode.begin_keypress_cond.key_mask & 0x7FFFFFF) || (cur_opcode.begin_keypress_cond.key_mask & 0x7FFFFFF & keyold) == (cur_opcode.begin_keypress_cond.key_mask & 0x7FFFFFF)) {
+                    if ((cur_opcode.begin_keypress_cond.key_mask & kHeld) != cur_opcode.begin_keypress_cond.key_mask) {
+                        /* Keys not pressed. Skip conditional block. */
+                        this->SkipConditionalBlock(true);
+                    }
+                    break;
+                case CheatVmOpcodeType_BeginExtendedKeypressConditionalBlock:
+                    /* Check for keypress. */
+                    if (!cur_opcode.begin_ext_keypress_cond.auto_repeat) {
+                        if ((cur_opcode.begin_ext_keypress_cond.key_mask & kHeld) != (cur_opcode.begin_ext_keypress_cond.key_mask) || (cur_opcode.begin_ext_keypress_cond.key_mask & keyold) == (cur_opcode.begin_ext_keypress_cond.key_mask)) {
                             /* Keys not pressed. Skip conditional block. */
                             this->SkipConditionalBlock(true);
                         }
-                    } else if ((cur_opcode.begin_keypress_cond.key_mask & kHeld) != cur_opcode.begin_keypress_cond.key_mask) {
+                    } else if ((cur_opcode.begin_ext_keypress_cond.key_mask & kHeld) != cur_opcode.begin_ext_keypress_cond.key_mask) {
                         /* Keys not pressed. Skip conditional block. */
                         this->SkipConditionalBlock(true);
                     }
diff --git a/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.hpp b/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.hpp
index c659dffdf..a42d9c4cc 100644
--- a/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.hpp
+++ b/stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.hpp
@@ -43,6 +43,7 @@ namespace ams::dmnt::cheat::impl {
         CheatVmOpcodeType_SaveRestoreRegister = 0xC1,
         CheatVmOpcodeType_SaveRestoreRegisterMask = 0xC2,
         CheatVmOpcodeType_ReadWriteStaticRegister = 0xC3,
+        CheatVmOpcodeType_BeginExtendedKeypressConditionalBlock = 0xC4,
 
         /* This is a meta entry, and not a real opcode. */
         /* This is to facilitate multi-nybble instruction decoding. */
@@ -192,6 +193,11 @@ namespace ams::dmnt::cheat::impl {
         u32 key_mask;
     };
 
+    struct BeginExtendedKeypressConditionalOpcode {
+        u64 key_mask;
+        bool auto_repeat;
+    };
+
     struct PerformArithmeticRegisterOpcode {
         u32 bit_width;
         RegisterArithmeticType math_type;
@@ -266,6 +272,7 @@ namespace ams::dmnt::cheat::impl {
             StoreStaticToAddressOpcode str_static;
             PerformArithmeticStaticOpcode perform_math_static;
             BeginKeypressConditionalOpcode begin_keypress_cond;
+            BeginExtendedKeypressConditionalOpcode begin_ext_keypress_cond;
             PerformArithmeticRegisterOpcode perform_math_reg;
             StoreRegisterToAddressOpcode str_register;
             BeginRegisterConditionalOpcode begin_reg_cond;