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Type 9 extension for floating point math

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tomvita 2025-01-08 16:59:43 +08:00
parent 52d2df33c7
commit 4e5a067a7b
3 changed files with 27 additions and 20 deletions
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9
docs/features/cheats.md
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@ -271,11 +271,10 @@ Code type 0x9 allows performing arithmetic on registers.
+ 7: Logical Not (discards right-hand operand) + 7: Logical Not (discards right-hand operand)
+ 8: Logical Xor + 8: Logical Xor
+ 9: None/Move (discards right-hand operand) + 9: None/Move (discards right-hand operand)
+ 10: Float Addition, Width force to 4 bytes + 10: Float Addition, T==4 single T==8 double
+ 11: Float Multiplication, Width force to 4 bytes + 11: Float Subtraction, T==4 single T==8 double
+ 12: Double Addition, Width force to 8 bytes + 12: Float Multiplication, T==4 single T==8 double
+ 13: Double Multiplication, Width force to 8 bytes + 13: Float Division, T==4 single T==8 double
--- ---
### Code Type 0xA: Store Register to Memory Address ### Code Type 0xA: Store Register to Memory Address

28
stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.cpp
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@ -1060,22 +1060,30 @@ namespace ams::dmnt::cheat::impl {
case RegisterArithmeticType_None: case RegisterArithmeticType_None:
res_val = operand_1_value; res_val = operand_1_value;
break; break;
case RegisterArithmeticType_FloatAddition: { case RegisterArithmeticType_FloatAddition:
cur_opcode.perform_math_reg.bit_width = 4; if (cur_opcode.perform_math_reg.bit_width == 4)
*(float *)&res_val = *(float *)&operand_1_value + *(float *)&operand_2_value; *(float *)&res_val = *(float *)&operand_1_value + *(float *)&operand_2_value;
if (cur_opcode.perform_math_reg.bit_width == 8)
*(double *)&res_val = *(double *)&operand_1_value + *(double *)&operand_2_value;
break;
case RegisterArithmeticType_FloatSubtraction: {
if (cur_opcode.perform_math_reg.bit_width == 4)
*(float *)&res_val = *(float *)&operand_1_value - *(float *)&operand_2_value;
if (cur_opcode.perform_math_reg.bit_width == 8)
*(double *)&res_val = *(double *)&operand_1_value - *(double *)&operand_2_value;
} break; } break;
case RegisterArithmeticType_FloatMultiplication: { case RegisterArithmeticType_FloatMultiplication: {
cur_opcode.perform_math_reg.bit_width = 4; if (cur_opcode.perform_math_reg.bit_width == 4)
*(float *)&res_val = *(float *)&operand_1_value * *(float *)&operand_2_value; *(float *)&res_val = *(float *)&operand_1_value * *(float *)&operand_2_value;
} break; if (cur_opcode.perform_math_reg.bit_width == 8)
case RegisterArithmeticType_DoubleAddition: {
cur_opcode.perform_math_reg.bit_width = 8;
*(double *)&res_val = *(double *)&operand_1_value + *(double *)&operand_2_value;
} break;
case RegisterArithmeticType_DoubleMultiplication: {
cur_opcode.perform_math_reg.bit_width = 8;
*(double *)&res_val = *(double *)&operand_1_value * *(double *)&operand_2_value; *(double *)&res_val = *(double *)&operand_1_value * *(double *)&operand_2_value;
} break; } break;
case RegisterArithmeticType_FloatDivision: {
if (cur_opcode.perform_math_reg.bit_width == 4)
*(float *)&res_val = *(float *)&operand_1_value / *(float *)&operand_2_value;
if (cur_opcode.perform_math_reg.bit_width == 8)
*(double *)&res_val = *(double *)&operand_1_value / *(double *)&operand_2_value;
} break;
} }

6
stratosphere/dmnt/source/cheat/impl/dmnt_cheat_vm.hpp
View File

@ -87,9 +87,9 @@ namespace ams::dmnt::cheat::impl {
RegisterArithmeticType_None = 9, RegisterArithmeticType_None = 9,
RegisterArithmeticType_FloatAddition = 10, RegisterArithmeticType_FloatAddition = 10,
RegisterArithmeticType_FloatMultiplication = 11, RegisterArithmeticType_FloatSubtraction = 11,
RegisterArithmeticType_DoubleAddition = 12, RegisterArithmeticType_FloatMultiplication = 12,
RegisterArithmeticType_DoubleMultiplication = 13, RegisterArithmeticType_FloatDivision = 13,
}; };
enum StoreRegisterOffsetType : u32 { enum StoreRegisterOffsetType : u32 {