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			61 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			61 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| /*
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|  * Copyright (c) Atmosphère-NX
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|  *
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|  * This program is free software; you can redistribute it and/or modify it
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|  * under the terms and conditions of the GNU General Public License,
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|  * version 2, as published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope it will be useful, but WITHOUT
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|  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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|  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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|  * more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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|  */
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| #pragma once
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| #include <stratosphere.hpp>
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| 
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| namespace ams::os::impl {
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| 
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|     inline void FlushDataCacheImpl(const void *addr, size_t size) {
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|         #if defined(ATMOSPHERE_ARCH_ARM64)
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|         {
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|             /* Declare helper variables. */
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|             uintptr_t cache_type_register = 0;
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|             uintptr_t cache_line_size     = 0;
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|             const uintptr_t end_addr      = reinterpret_cast<uintptr_t>(addr) + size;
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| 
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|             /* Get the cache type register. */
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|             __asm__ __volatile__("mrs %[cache_type_register], ctr_el0" : [cache_type_register]"=r"(cache_type_register));
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| 
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|             /* Calculate cache line size. */
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|             cache_line_size = 4 << ((cache_type_register >> 16) & 0xF);
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| 
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|             /* Get the thread local region. */
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|             auto * const tlr = svc::GetThreadLocalRegion();
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| 
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|             /* Note to the kernel that we're performing cache maintenance, in case we get interrupted while touching cache lines. */
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|             tlr->cache_maintenance_flag = 1;
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|             ON_SCOPE_EXIT { tlr->cache_maintenance_flag = 0; };
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| 
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|             /* Iterate, flushing cache lines. */
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|             for (uintptr_t cur = reinterpret_cast<uintptr_t>(addr) & ~(cache_line_size - 1); cur < end_addr; cur += cache_line_size) {
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|                 __asm__ __volatile__ ("dc civac, %[cur]" :: [cur]"r"(cur));
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|             }
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| 
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|             /* Insert a memory barrier, now that memory has been flushed. */
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|             __asm__ __volatile__("dsb sy" ::: "memory");
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|         }
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|         #else
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|             const auto result = svc::FlushProcessDataCache(svc::PseudoHandle::CurrentProcess, reinterpret_cast<uintptr_t>(addr), size);
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|             R_ASSERT(result);
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|             AMS_UNUSED(result);
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|         #endif
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|     }
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| 
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|     inline void FlushEntireDataCacheImpl() {
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|         svc::FlushEntireDataCache();
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|     }
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| 
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| } |