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https://github.com/Atmosphere-NX/Atmosphere-libs.git
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715eff2102
Also, fix a few very embarassing mistakes in kernel ldr: * We have been mapping the page table region RWX for a few years now, accidentally. * My attempt at making initial page tables not use bit 58 was broken in multiple ways.
538 lines
32 KiB
C++
538 lines
32 KiB
C++
/*
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* Copyright (c) Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <mesosphere.hpp>
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namespace ams::kern::arch::arm64 {
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void KPageTableImpl::InitializeForKernel(void *tb, KVirtualAddress start, KVirtualAddress end) {
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m_table = static_cast<L1PageTableEntry *>(tb);
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m_is_kernel = true;
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m_num_entries = util::AlignUp(end - start, L1BlockSize) / L1BlockSize;
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/* Page table entries created by KInitialPageTable need to be iterated and modified to ensure KPageTable invariants. */
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PageTableEntry *level_entries[EntryLevel_Count] = { nullptr, nullptr, m_table };
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u32 level = EntryLevel_L1;
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while (level != EntryLevel_L1 || (level_entries[EntryLevel_L1] - static_cast<PageTableEntry *>(m_table)) < m_num_entries) {
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/* Get the pte; it must never have the validity-extension flag set. */
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auto *pte = level_entries[level];
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MESOSPHERE_ASSERT((pte->GetSoftwareReservedBits() & PageTableEntry::SoftwareReservedBit_Valid) == 0);
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/* While we're a table, recurse, fixing up the reference counts. */
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while (level > EntryLevel_L3 && pte->IsMappedTable()) {
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/* Count how many references are in the table. */
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auto *table = GetPointer<PageTableEntry>(GetPageTableVirtualAddress(pte->GetTable()));
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size_t ref_count = 0;
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for (size_t i = 0; i < BlocksPerTable; ++i) {
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if (table[i].IsMapped()) {
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++ref_count;
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}
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}
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/* Set the reference count for our new page, adding one additional uncloseable reference; kernel pages must never be unreferenced. */
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pte->SetTableReferenceCount(ref_count + 1).SetValid();
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/* Iterate downwards. */
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level -= 1;
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level_entries[level] = table;
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pte = level_entries[level];
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/* Check that the entry isn't unexpected. */
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MESOSPHERE_ASSERT((pte->GetSoftwareReservedBits() & PageTableEntry::SoftwareReservedBit_Valid) == 0);
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}
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/* We're dealing with some block. If it's mapped, set it valid. */
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if (pte->IsMapped()) {
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pte->SetValid();
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}
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/* Advance. */
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while (true) {
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/* Advance to the next entry at the current level. */
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if (!util::IsAligned(reinterpret_cast<uintptr_t>(++level_entries[level]), PageSize)) {
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break;
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}
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/* If we're at the end of a level, advance upwards. */
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level_entries[level++] = nullptr;
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if (level > EntryLevel_L1) {
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return;
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}
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}
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}
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}
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void KPageTableImpl::InitializeForProcess(void *tb, KVirtualAddress start, KVirtualAddress end) {
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m_table = static_cast<L1PageTableEntry *>(tb);
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m_is_kernel = false;
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m_num_entries = util::AlignUp(end - start, L1BlockSize) / L1BlockSize;
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}
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L1PageTableEntry *KPageTableImpl::Finalize() {
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return m_table;
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}
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bool KPageTableImpl::BeginTraversal(TraversalEntry *out_entry, TraversalContext *out_context, KProcessAddress address) const {
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/* Setup invalid defaults. */
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*out_entry = {};
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*out_context = {};
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/* Validate that we can read the actual entry. */
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const size_t l0_index = GetL0Index(address);
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const size_t l1_index = GetL1Index(address);
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if (m_is_kernel) {
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/* Kernel entries must be accessed via TTBR1. */
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if ((l0_index != MaxPageTableEntries - 1) || (l1_index < MaxPageTableEntries - m_num_entries)) {
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return false;
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}
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} else {
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/* User entries must be accessed with TTBR0. */
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if ((l0_index != 0) || l1_index >= m_num_entries) {
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return false;
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}
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}
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/* Get the L1 entry, and check if it's a table. */
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out_context->level_entries[EntryLevel_L1] = this->GetL1Entry(address);
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if (out_context->level_entries[EntryLevel_L1]->IsMappedTable()) {
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/* Get the L2 entry, and check if it's a table. */
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out_context->level_entries[EntryLevel_L2] = this->GetL2EntryFromTable(GetPageTableVirtualAddress(out_context->level_entries[EntryLevel_L1]->GetTable()), address);
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if (out_context->level_entries[EntryLevel_L2]->IsMappedTable()) {
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/* Get the L3 entry. */
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out_context->level_entries[EntryLevel_L3] = this->GetL3EntryFromTable(GetPageTableVirtualAddress(out_context->level_entries[EntryLevel_L2]->GetTable()), address);
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/* It's either a page or not. */
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out_context->level = EntryLevel_L3;
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} else {
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/* Not a L2 table, so possibly an L2 block. */
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out_context->level = EntryLevel_L2;
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}
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} else {
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/* Not a L1 table, so possibly an L1 block. */
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out_context->level = EntryLevel_L1;
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}
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/* Determine other fields. */
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const auto *pte = out_context->level_entries[out_context->level];
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out_context->is_contiguous = pte->IsContiguous();
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out_entry->sw_reserved_bits = pte->GetSoftwareReservedBits();
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out_entry->attr = 0;
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out_entry->phys_addr = this->GetBlock(pte, out_context->level) + this->GetOffset(address, out_context->level);
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out_entry->block_size = static_cast<size_t>(1) << (PageBits + LevelBits * out_context->level + 4 * out_context->is_contiguous);
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return out_context->level == EntryLevel_L3 ? pte->IsPage() : pte->IsBlock();
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}
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bool KPageTableImpl::ContinueTraversal(TraversalEntry *out_entry, TraversalContext *context) const {
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/* Advance entry. */
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auto *cur_pte = context->level_entries[context->level];
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auto *next_pte = reinterpret_cast<PageTableEntry *>(context->is_contiguous ? util::AlignDown(reinterpret_cast<uintptr_t>(cur_pte), BlocksPerContiguousBlock * sizeof(PageTableEntry)) + BlocksPerContiguousBlock * sizeof(PageTableEntry) : reinterpret_cast<uintptr_t>(cur_pte) + sizeof(PageTableEntry));
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/* Set the pte. */
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context->level_entries[context->level] = next_pte;
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/* Advance appropriately. */
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while (context->level < EntryLevel_L1 && util::IsAligned(reinterpret_cast<uintptr_t>(context->level_entries[context->level]), PageSize)) {
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/* Advance the above table by one entry. */
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context->level_entries[context->level + 1]++;
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context->level = static_cast<EntryLevel>(util::ToUnderlying(context->level) + 1);
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}
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/* Check if we've hit the end of the L1 table. */
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if (context->level == EntryLevel_L1) {
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if (context->level_entries[EntryLevel_L1] - static_cast<const PageTableEntry *>(m_table) >= m_num_entries) {
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*context = {};
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*out_entry = {};
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return false;
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}
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}
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/* We may have advanced to a new table, and if we have we should descend. */
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while (context->level > EntryLevel_L3 && context->level_entries[context->level]->IsMappedTable()) {
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context->level_entries[context->level - 1] = GetPointer<PageTableEntry>(GetPageTableVirtualAddress(context->level_entries[context->level]->GetTable()));
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context->level = static_cast<EntryLevel>(util::ToUnderlying(context->level) - 1);
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}
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const auto *pte = context->level_entries[context->level];
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context->is_contiguous = pte->IsContiguous();
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out_entry->sw_reserved_bits = pte->GetSoftwareReservedBits();
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out_entry->attr = 0;
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out_entry->phys_addr = this->GetBlock(pte, context->level);
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out_entry->block_size = static_cast<size_t>(1) << (PageBits + LevelBits * context->level + 4 * context->is_contiguous);
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return context->level == EntryLevel_L3 ? pte->IsPage() : pte->IsBlock();
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}
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bool KPageTableImpl::GetPhysicalAddress(KPhysicalAddress *out, KProcessAddress address) const {
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/* Validate that we can read the actual entry. */
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const size_t l0_index = GetL0Index(address);
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const size_t l1_index = GetL1Index(address);
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if (m_is_kernel) {
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/* Kernel entries must be accessed via TTBR1. */
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if ((l0_index != MaxPageTableEntries - 1) || (l1_index < MaxPageTableEntries - m_num_entries)) {
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return false;
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}
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} else {
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/* User entries must be accessed with TTBR0. */
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if ((l0_index != 0) || l1_index >= m_num_entries) {
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return false;
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}
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}
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/* Get the L1 entry, and check if it's a table. */
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const PageTableEntry *pte = this->GetL1Entry(address);
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EntryLevel level = EntryLevel_L1;
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if (pte->IsMappedTable()) {
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/* Get the L2 entry, and check if it's a table. */
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pte = this->GetL2EntryFromTable(GetPageTableVirtualAddress(pte->GetTable()), address);
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level = EntryLevel_L2;
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if (pte->IsMappedTable()) {
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pte = this->GetL3EntryFromTable(GetPageTableVirtualAddress(pte->GetTable()), address);
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level = EntryLevel_L3;
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}
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}
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const bool is_block = level == EntryLevel_L3 ? pte->IsPage() : pte->IsBlock();
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if (is_block) {
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*out = this->GetBlock(pte, level) + this->GetOffset(address, level);
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} else {
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*out = Null<KPhysicalAddress>;
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}
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return is_block;
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}
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bool KPageTableImpl::MergePages(KVirtualAddress *out, TraversalContext *context) {
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/* We want to upgrade the pages by one step. */
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if (context->is_contiguous) {
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/* We can't merge an L1 table. */
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if (context->level == EntryLevel_L1) {
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return false;
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}
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/* We want to upgrade a contiguous mapping in a table to a block. */
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PageTableEntry *pte = reinterpret_cast<PageTableEntry *>(util::AlignDown(reinterpret_cast<uintptr_t>(context->level_entries[context->level]), BlocksPerTable * sizeof(PageTableEntry)));
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const KPhysicalAddress phys_addr = util::AlignDown(GetBlock(pte, context->level), GetBlockSize(static_cast<EntryLevel>(context->level + 1), false));
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/* First, check that all entries are valid for us to merge. */
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const u64 entry_template = pte->GetEntryTemplateForMerge();
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for (size_t i = 0; i < BlocksPerTable; ++i) {
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if (!pte[i].IsForMerge(entry_template | GetInteger(phys_addr + (i << (PageBits + LevelBits * context->level))) | PageTableEntry::ContigType_Contiguous | pte->GetTestTableMask())) {
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return false;
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}
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if (i > 0 && pte[i].IsHeadOrHeadAndBodyMergeDisabled()) {
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return false;
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}
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if (i < BlocksPerTable - 1 && pte[i].IsTailMergeDisabled()) {
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return false;
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}
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}
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/* The entries are valid for us to merge, so merge them. */
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const auto *head_pte = pte;
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const auto *tail_pte = pte + BlocksPerTable - 1;
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const auto sw_reserved_bits = PageTableEntry::EncodeSoftwareReservedBits(head_pte->IsHeadMergeDisabled(), head_pte->IsHeadAndBodyMergeDisabled(), tail_pte->IsTailMergeDisabled());
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*context->level_entries[context->level + 1] = PageTableEntry(PageTableEntry::BlockTag{}, phys_addr, PageTableEntry(entry_template), sw_reserved_bits, false, false);
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/* Update our context. */
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context->is_contiguous = false;
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context->level = static_cast<EntryLevel>(util::ToUnderlying(context->level) + 1);
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/* Set the output to the table we just freed. */
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*out = KVirtualAddress(pte);
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} else {
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/* We want to upgrade a non-contiguous mapping to a contiguous mapping. */
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PageTableEntry *pte = reinterpret_cast<PageTableEntry *>(util::AlignDown(reinterpret_cast<uintptr_t>(context->level_entries[context->level]), BlocksPerContiguousBlock * sizeof(PageTableEntry)));
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const KPhysicalAddress phys_addr = util::AlignDown(GetBlock(pte, context->level), GetBlockSize(context->level, true));
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/* First, check that all entries are valid for us to merge. */
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const u64 entry_template = pte->GetEntryTemplateForMerge();
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for (size_t i = 0; i < BlocksPerContiguousBlock; ++i) {
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if (!pte[i].IsForMerge(entry_template | GetInteger(phys_addr + (i << (PageBits + LevelBits * context->level))) | pte->GetTestTableMask())) {
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return false;
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}
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if (i > 0 && pte[i].IsHeadOrHeadAndBodyMergeDisabled()) {
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return false;
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}
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if (i < BlocksPerContiguousBlock - 1 && pte[i].IsTailMergeDisabled()) {
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return false;
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}
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}
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/* The entries are valid for us to merge, so merge them. */
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const auto *head_pte = pte;
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const auto *tail_pte = pte + BlocksPerContiguousBlock - 1;
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const auto sw_reserved_bits = PageTableEntry::EncodeSoftwareReservedBits(head_pte->IsHeadMergeDisabled(), head_pte->IsHeadAndBodyMergeDisabled(), tail_pte->IsTailMergeDisabled());
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for (size_t i = 0; i < BlocksPerContiguousBlock; ++i) {
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pte[i] = PageTableEntry(PageTableEntry::BlockTag{}, phys_addr + (i << (PageBits + LevelBits * context->level)), PageTableEntry(entry_template), sw_reserved_bits, true, context->level == EntryLevel_L3);
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}
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/* Update our context. */
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context->level_entries[context->level] = pte;
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context->is_contiguous = true;
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}
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return true;
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}
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void KPageTableImpl::SeparatePages(TraversalEntry *entry, TraversalContext *context, KProcessAddress address, PageTableEntry *pte) const {
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/* We want to downgrade the pages by one step. */
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if (context->is_contiguous) {
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/* We want to downgrade a contiguous mapping to a non-contiguous mapping. */
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pte = reinterpret_cast<PageTableEntry *>(util::AlignDown(reinterpret_cast<uintptr_t>(context->level_entries[context->level]), BlocksPerContiguousBlock * sizeof(PageTableEntry)));
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auto * const first = pte;
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const KPhysicalAddress block = this->GetBlock(first, context->level);
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for (size_t i = 0; i < BlocksPerContiguousBlock; ++i) {
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pte[i] = PageTableEntry(PageTableEntry::BlockTag{}, block + (i << (PageBits + LevelBits * context->level)), PageTableEntry(first->GetEntryTemplateForSeparateContiguous(i)), PageTableEntry::SeparateContiguousTag{});
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}
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context->is_contiguous = false;
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context->level_entries[context->level] = pte + (this->GetLevelIndex(address, context->level) & (BlocksPerContiguousBlock - 1));
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} else {
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/* We want to downgrade a block into a table. */
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auto * const first = context->level_entries[context->level];
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const KPhysicalAddress block = this->GetBlock(first, context->level);
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for (size_t i = 0; i < BlocksPerTable; ++i) {
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pte[i] = PageTableEntry(PageTableEntry::BlockTag{}, block + (i << (PageBits + LevelBits * (context->level - 1))), PageTableEntry(first->GetEntryTemplateForSeparate(i)), PageTableEntry::SoftwareReservedBit_None, true, context->level - 1 == EntryLevel_L3);
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}
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context->is_contiguous = true;
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context->level = static_cast<EntryLevel>(util::ToUnderlying(context->level) - 1);
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/* Wait for pending stores to complete. */
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cpu::DataSynchronizationBarrierInnerShareableStore();
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/* Update the block entry to be a table entry. */
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*context->level_entries[context->level + 1] = PageTableEntry(PageTableEntry::TableTag{}, KPageTable::GetPageTablePhysicalAddress(KVirtualAddress(pte)), m_is_kernel, true, BlocksPerTable);
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context->level_entries[context->level] = pte + this->GetLevelIndex(address, context->level);
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}
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entry->sw_reserved_bits = 0;
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entry->attr = 0;
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entry->phys_addr = this->GetBlock(context->level_entries[context->level], context->level) + this->GetOffset(address, context->level);
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entry->block_size = static_cast<size_t>(1) << (PageBits + LevelBits * context->level + 4 * context->is_contiguous);
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}
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void KPageTableImpl::Dump(uintptr_t start, size_t size) const {
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/* If zero size, there's nothing to dump. */
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if (size == 0) {
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return;
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}
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/* Define extents. */
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const uintptr_t end = start + size;
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const uintptr_t last = end - 1;
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/* Define tracking variables. */
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bool unmapped = false;
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uintptr_t unmapped_start = 0;
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/* Walk the table. */
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uintptr_t cur = start;
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while (cur < end) {
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/* Validate that we can read the actual entry. */
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const size_t l0_index = GetL0Index(cur);
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const size_t l1_index = GetL1Index(cur);
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if (m_is_kernel) {
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/* Kernel entries must be accessed via TTBR1. */
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if ((l0_index != MaxPageTableEntries - 1) || (l1_index < MaxPageTableEntries - m_num_entries)) {
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return;
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}
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} else {
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/* User entries must be accessed with TTBR0. */
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if ((l0_index != 0) || l1_index >= m_num_entries) {
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return;
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}
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}
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/* Try to get from l1 table. */
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const L1PageTableEntry *l1_entry = this->GetL1Entry(cur);
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if (l1_entry->IsBlock()) {
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/* Update. */
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cur = util::AlignDown(cur, L1BlockSize);
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if (unmapped) {
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unmapped = false;
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MESOSPHERE_RELEASE_LOG("%016lx - %016lx: not mapped\n", unmapped_start, cur - 1);
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}
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/* Print. */
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MESOSPHERE_RELEASE_LOG("%016lx: %016lx PA=%p SZ=1G Mapped=%d UXN=%d PXN=%d Cont=%d nG=%d AF=%d SH=%x RO=%d UA=%d NS=%d AttrIndx=%d NoMerge=%d,%d,%d\n", cur,
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*reinterpret_cast<const u64 *>(l1_entry),
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reinterpret_cast<void *>(GetInteger(l1_entry->GetBlock())),
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l1_entry->IsMapped(),
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l1_entry->IsUserExecuteNever(),
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l1_entry->IsPrivilegedExecuteNever(),
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l1_entry->IsContiguous(),
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!l1_entry->IsGlobal(),
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static_cast<int>(l1_entry->GetAccessFlagInteger()),
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static_cast<unsigned int>(l1_entry->GetShareableInteger()),
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l1_entry->IsReadOnly(),
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l1_entry->IsUserAccessible(),
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l1_entry->IsNonSecure(),
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static_cast<int>(l1_entry->GetPageAttributeInteger()),
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l1_entry->IsHeadMergeDisabled(),
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l1_entry->IsHeadAndBodyMergeDisabled(),
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l1_entry->IsTailMergeDisabled());
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/* Advance. */
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cur += L1BlockSize;
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continue;
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} else if (!l1_entry->IsTable()) {
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/* Update. */
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cur = util::AlignDown(cur, L1BlockSize);
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if (!unmapped) {
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unmapped_start = cur;
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unmapped = true;
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}
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/* Advance. */
|
|
cur += L1BlockSize;
|
|
continue;
|
|
}
|
|
|
|
/* Try to get from l2 table. */
|
|
const L2PageTableEntry *l2_entry = this->GetL2Entry(l1_entry, cur);
|
|
if (l2_entry->IsBlock()) {
|
|
/* Update. */
|
|
cur = util::AlignDown(cur, L2BlockSize);
|
|
if (unmapped) {
|
|
unmapped = false;
|
|
MESOSPHERE_RELEASE_LOG("%016lx - %016lx: not mapped\n", unmapped_start, cur - 1);
|
|
}
|
|
|
|
/* Print. */
|
|
MESOSPHERE_RELEASE_LOG("%016lx: %016lx PA=%p SZ=2M Mapped=%d UXN=%d PXN=%d Cont=%d nG=%d AF=%d SH=%x RO=%d UA=%d NS=%d AttrIndx=%d NoMerge=%d,%d,%d\n", cur,
|
|
*reinterpret_cast<const u64 *>(l2_entry),
|
|
reinterpret_cast<void *>(GetInteger(l2_entry->GetBlock())),
|
|
l2_entry->IsMapped(),
|
|
l2_entry->IsUserExecuteNever(),
|
|
l2_entry->IsPrivilegedExecuteNever(),
|
|
l2_entry->IsContiguous(),
|
|
!l2_entry->IsGlobal(),
|
|
static_cast<int>(l2_entry->GetAccessFlagInteger()),
|
|
static_cast<unsigned int>(l2_entry->GetShareableInteger()),
|
|
l2_entry->IsReadOnly(),
|
|
l2_entry->IsUserAccessible(),
|
|
l2_entry->IsNonSecure(),
|
|
static_cast<int>(l2_entry->GetPageAttributeInteger()),
|
|
l2_entry->IsHeadMergeDisabled(),
|
|
l2_entry->IsHeadAndBodyMergeDisabled(),
|
|
l2_entry->IsTailMergeDisabled());
|
|
|
|
/* Advance. */
|
|
cur += L2BlockSize;
|
|
continue;
|
|
} else if (!l2_entry->IsTable()) {
|
|
/* Update. */
|
|
cur = util::AlignDown(cur, L2BlockSize);
|
|
if (!unmapped) {
|
|
unmapped_start = cur;
|
|
unmapped = true;
|
|
}
|
|
|
|
/* Advance. */
|
|
cur += L2BlockSize;
|
|
continue;
|
|
}
|
|
|
|
/* Try to get from l3 table. */
|
|
const L3PageTableEntry *l3_entry = this->GetL3Entry(l2_entry, cur);
|
|
if (l3_entry->IsBlock()) {
|
|
/* Update. */
|
|
cur = util::AlignDown(cur, L3BlockSize);
|
|
if (unmapped) {
|
|
unmapped = false;
|
|
MESOSPHERE_RELEASE_LOG("%016lx - %016lx: not mapped\n", unmapped_start, cur - 1);
|
|
}
|
|
|
|
/* Print. */
|
|
MESOSPHERE_RELEASE_LOG("%016lx: %016lx PA=%p SZ=4K Mapped=%d UXN=%d PXN=%d Cont=%d nG=%d AF=%d SH=%x RO=%d UA=%d NS=%d AttrIndx=%d NoMerge=%d,%d,%d\n", cur,
|
|
*reinterpret_cast<const u64 *>(l3_entry),
|
|
reinterpret_cast<void *>(GetInteger(l3_entry->GetBlock())),
|
|
l3_entry->IsMapped(),
|
|
l3_entry->IsUserExecuteNever(),
|
|
l3_entry->IsPrivilegedExecuteNever(),
|
|
l3_entry->IsContiguous(),
|
|
!l3_entry->IsGlobal(),
|
|
static_cast<int>(l3_entry->GetAccessFlagInteger()),
|
|
static_cast<unsigned int>(l3_entry->GetShareableInteger()),
|
|
l3_entry->IsReadOnly(),
|
|
l3_entry->IsUserAccessible(),
|
|
l3_entry->IsNonSecure(),
|
|
static_cast<int>(l3_entry->GetPageAttributeInteger()),
|
|
l3_entry->IsHeadMergeDisabled(),
|
|
l3_entry->IsHeadAndBodyMergeDisabled(),
|
|
l3_entry->IsTailMergeDisabled());
|
|
|
|
/* Advance. */
|
|
cur += L3BlockSize;
|
|
continue;
|
|
} else {
|
|
/* Update. */
|
|
cur = util::AlignDown(cur, L3BlockSize);
|
|
if (!unmapped) {
|
|
unmapped_start = cur;
|
|
unmapped = true;
|
|
}
|
|
|
|
/* Advance. */
|
|
cur += L3BlockSize;
|
|
continue;
|
|
}
|
|
}
|
|
|
|
/* Print the last unmapped range if necessary. */
|
|
if (unmapped) {
|
|
MESOSPHERE_RELEASE_LOG("%016lx - %016lx: not mapped\n", unmapped_start, last);
|
|
}
|
|
}
|
|
|
|
size_t KPageTableImpl::CountPageTables() const {
|
|
size_t num_tables = 0;
|
|
|
|
#if defined(MESOSPHERE_BUILD_FOR_DEBUGGING)
|
|
{
|
|
++num_tables;
|
|
for (size_t l1_index = 0; l1_index < m_num_entries; ++l1_index) {
|
|
auto &l1_entry = m_table[l1_index];
|
|
if (l1_entry.IsTable()) {
|
|
++num_tables;
|
|
for (size_t l2_index = 0; l2_index < MaxPageTableEntries; ++l2_index) {
|
|
auto *l2_entry = GetPointer<L2PageTableEntry>(GetTableEntry(KMemoryLayout::GetLinearVirtualAddress(l1_entry.GetTable()), l2_index));
|
|
if (l2_entry->IsTable()) {
|
|
++num_tables;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
return num_tables;
|
|
}
|
|
|
|
}
|