mirror of
https://github.com/Atmosphere-NX/Atmosphere-libs.git
synced 2025-11-17 02:01:18 +01:00
06ea58c7fa
NOTE: This work is not yet fully complete; kernel is done, but it was taking an exceedingly long time to get through libstratosphere. Thus, I've temporarily added -Wno-error=unused-result for libstratosphere/stratosphere. All warnings should be fixed to do the same thing Nintendo does as relevant, but this is taking a phenomenally long time and is not actually the most important work to do, so it can be put off for some time to prioritize other tasks for 21.0.0 support.
1320 lines
55 KiB
C++
1320 lines
55 KiB
C++
/*
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* Copyright (c) Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#if defined(ATMOSPHERE_IS_STRATOSPHERE)
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#include <stratosphere.hpp>
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#elif defined(ATMOSPHERE_IS_MESOSPHERE)
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#include <mesosphere.hpp>
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#elif defined(ATMOSPHERE_IS_EXOSPHERE)
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#include <exosphere.hpp>
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#else
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#include <vapours.hpp>
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#endif
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#include "sdmmc_sdmmc_controller.board.nintendo_nx.hpp"
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#include "sdmmc_io_impl.board.nintendo_nx.hpp"
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#include "sdmmc_timer.hpp"
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namespace ams::sdmmc::impl {
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/* FOR REFERENCE: board-specific sdmmc registers. */
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//struct SdmmcRegisters {
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// /* Standard registers. */
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// volatile SdHostStandardRegisters sd_host_standard_registers;
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//
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// /* Vendor specific registers */
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// volatile uint32_t vendor_clock_cntrl;
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// volatile uint32_t vendor_sys_sw_cntrl;
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// volatile uint32_t vendor_err_intr_status;
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// volatile uint32_t vendor_cap_overrides;
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// volatile uint32_t vendor_boot_cntrl;
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// volatile uint32_t vendor_boot_ack_timeout;
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// volatile uint32_t vendor_boot_dat_timeout;
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// volatile uint32_t vendor_debounce_count;
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// volatile uint32_t vendor_misc_cntrl;
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// volatile uint32_t max_current_override;
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// volatile uint32_t max_current_override_hi;
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// volatile uint32_t _0x12c[0x20];
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// volatile uint32_t vendor_io_trim_cntrl;
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//
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// /* Start of sdmmc2/sdmmc4 only */
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// volatile uint32_t vendor_dllcal_cfg;
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// volatile uint32_t vendor_dll_ctrl0;
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// volatile uint32_t vendor_dll_ctrl1;
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// volatile uint32_t vendor_dllcal_cfg_sta;
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// /* End of sdmmc2/sdmmc4 only */
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//
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// volatile uint32_t vendor_tuning_cntrl0;
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// volatile uint32_t vendor_tuning_cntrl1;
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// volatile uint32_t vendor_tuning_status0;
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// volatile uint32_t vendor_tuning_status1;
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// volatile uint32_t vendor_clk_gate_hysteresis_count;
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// volatile uint32_t vendor_preset_val0;
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// volatile uint32_t vendor_preset_val1;
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// volatile uint32_t vendor_preset_val2;
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// volatile uint32_t sdmemcomppadctrl;
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// volatile uint32_t auto_cal_config;
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// volatile uint32_t auto_cal_interval;
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// volatile uint32_t auto_cal_status;
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// volatile uint32_t io_spare;
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// volatile uint32_t sdmmca_mccif_fifoctrl;
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// volatile uint32_t timeout_wcoal_sdmmca;
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// volatile uint32_t _0x1fc;
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//};
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DEFINE_SD_REG_BIT_ENUM(VENDOR_CLOCK_CNTRL_SPI_MODE_CLKEN_OVERRIDE, 2, NORMAL, OVERRIDE);
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DEFINE_SD_REG(VENDOR_CLOCK_CNTRL_TAP_VAL, 16, 8);
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DEFINE_SD_REG(VENDOR_CLOCK_CNTRL_TRIM_VAL, 24, 5);
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DEFINE_SD_REG(VENDOR_CAP_OVERRIDES_DQS_TRIM_VAL, 8, 6);
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DEFINE_SD_REG(VENDOR_IO_TRIM_CNTRL_SEL_VREG, 2, 1);
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DEFINE_SD_REG_BIT_ENUM(VENDOR_DLLCAL_CFG_CALIBRATE, 31, DISABLE, ENABLE);
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DEFINE_SD_REG_BIT_ENUM(VENDOR_DLLCAL_CFG_STA_DLL_CAL_ACTIVE, 31, DONE, RUNNING);
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DEFINE_SD_REG(VENDOR_TUNING_CNTRL0_MUL_M, 6, 7);
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DEFINE_SD_REG_THREE_BIT_ENUM(VENDOR_TUNING_CNTRL0_NUM_TUNING_ITERATIONS, 13, TRIES_40, TRIES_64, TRIES_128, TRIES_192, TRIES_256, RESERVED5, RESERVED6, RESERVED7);
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DEFINE_SD_REG_BIT_ENUM(VENDOR_TUNING_CNTRL0_TAP_VALUE_UPDATED_BY_HW, 17, NOT_UPDATED_BY_HW, UPDATED_BY_HW);
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DEFINE_SD_REG(SDMEMCOMPPADCTRL_SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL, 0, 4);
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DEFINE_SD_REG(SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD, 31, 1);
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DEFINE_SD_REG(AUTO_CAL_CONFIG_AUTO_CAL_PU_OFFSET, 0, 7);
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DEFINE_SD_REG(AUTO_CAL_CONFIG_AUTO_CAL_PD_OFFSET, 8, 7);
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DEFINE_SD_REG_BIT_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_ENABLE, 29, DISABLED, ENABLED);
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DEFINE_SD_REG_BIT_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_START, 31, DISABLED, ENABLED);
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DEFINE_SD_REG(AUTO_CAL_STATUS_AUTO_CAL_PULLUP, 0, 7);
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DEFINE_SD_REG_BIT_ENUM(AUTO_CAL_STATUS_AUTO_CAL_ACTIVE, 31, INACTIVE, ACTIVE);
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DEFINE_SD_REG_BIT_ENUM(IO_SPARE_SPARE_OUT_3, 19, TWO_CYCLE_DELAY, ONE_CYCLE_DELAY);
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namespace {
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constexpr inline u32 TuningCommandTimeoutMilliSeconds = 5;
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constexpr void GetDividerSetting(u32 *out_target_clock_frequency_khz, u16 *out_x, SpeedMode speed_mode) {
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switch (speed_mode) {
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case SpeedMode_MmcIdentification:
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*out_target_clock_frequency_khz = 26000;
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*out_x = 66;
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break;
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case SpeedMode_MmcLegacySpeed:
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*out_target_clock_frequency_khz = 26000;
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*out_x = 1;
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break;
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case SpeedMode_MmcHighSpeed:
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*out_target_clock_frequency_khz = 52000;
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*out_x = 1;
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break;
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case SpeedMode_MmcHs200:
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*out_target_clock_frequency_khz = 200000;
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*out_x = 1;
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break;
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case SpeedMode_MmcHs400:
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*out_target_clock_frequency_khz = 200000;
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*out_x = 1;
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break;
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case SpeedMode_SdCardIdentification:
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*out_target_clock_frequency_khz = 25000;
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*out_x = 64;
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break;
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case SpeedMode_SdCardDefaultSpeed:
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*out_target_clock_frequency_khz = 25000;
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*out_x = 1;
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break;
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case SpeedMode_SdCardHighSpeed:
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*out_target_clock_frequency_khz = 50000;
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*out_x = 1;
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break;
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case SpeedMode_SdCardSdr12:
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*out_target_clock_frequency_khz = 25000;
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*out_x = 1;
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break;
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case SpeedMode_SdCardSdr50:
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*out_target_clock_frequency_khz = 100000;
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*out_x = 1;
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break;
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case SpeedMode_SdCardSdr104:
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*out_target_clock_frequency_khz = 200000;
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*out_x = 1;
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break;
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case SpeedMode_GcAsicFpgaSpeed:
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*out_target_clock_frequency_khz = 40800;
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*out_x = 1;
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break;
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case SpeedMode_GcAsicSpeed:
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*out_target_clock_frequency_khz = 200000;
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*out_x = 2;
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break;
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case SpeedMode_SdCardSdr25:
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case SpeedMode_SdCardDdr50:
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AMS_UNREACHABLE_DEFAULT_CASE();
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}
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}
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}
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namespace {
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#if defined(AMS_SDMMC_THREAD_SAFE)
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constinit os::SdkMutex g_soc_mutex;
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#define AMS_SDMMC_LOCK_SOC_MUTEX() std::scoped_lock lk(g_soc_mutex)
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#else
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#define AMS_SDMMC_LOCK_SOC_MUTEX()
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#endif
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constinit bool g_determined_soc = false;
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constinit bool g_is_soc_mariko = false;
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}
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bool IsSocMariko() {
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if (!g_determined_soc) {
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/* Ensure we have exclusive access to the soc variables. */
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AMS_SDMMC_LOCK_SOC_MUTEX();
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/* Check the SocType. */
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#if defined(ATMOSPHERE_IS_EXOSPHERE)
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{
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g_is_soc_mariko = fuse::GetSocType() == fuse::SocType_Mariko;
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}
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#elif defined(ATMOSPHERE_IS_MESOSPHERE)
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{
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MESOSPHERE_TODO("Detect mariko via KSystemControl call?");
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}
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#elif defined(ATMOSPHERE_IS_STRATOSPHERE)
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{
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/* Connect to spl for the duration of our check. */
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spl::Initialize();
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ON_SCOPE_EXIT { spl::Finalize(); };
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g_is_soc_mariko = spl::GetSocType() == spl::SocType_Mariko;
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}
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#else
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#error "Unknown execution context for ams::sdmmc::impl::IsSocMariko"
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#endif
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/* Note that we determined the soc. */
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g_determined_soc = true;
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}
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return g_is_soc_mariko;
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}
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void SdmmcController::ReleaseReset(SpeedMode speed_mode) {
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/* Get the clock reset module. */
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const auto module = this->GetClockResetModule();
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/* If the module is available, disable clock. */
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if (ClockResetController::IsAvailable(module)) {
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SdHostStandardController::DisableDeviceClock();
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SdHostStandardController::EnsureControl();
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}
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/* Get the correct divider setting for the speed mode. */
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u32 target_clock_frequency_khz;
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u16 x;
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GetDividerSetting(std::addressof(target_clock_frequency_khz), std::addressof(x), speed_mode);
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/* Release reset. */
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ClockResetController::ReleaseReset(module, target_clock_frequency_khz);
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}
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void SdmmcController::AssertReset() {
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return ClockResetController::AssertReset(this->GetClockResetModule());
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}
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Result SdmmcController::StartupCore(BusPower bus_power) {
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/* Set schmitt trigger. */
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this->SetSchmittTrigger(bus_power);
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/* Select one-cycle delay version of cmd_oen. */
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reg::ReadWrite(m_sdmmc_registers->io_spare, SD_REG_BITS_ENUM(IO_SPARE_SPARE_OUT_3, ONE_CYCLE_DELAY));
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/* Select regulated reference voltage for trimmer and DLL supply. */
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reg::ReadWrite(m_sdmmc_registers->vendor_io_trim_cntrl, SD_REG_BITS_VALUE(VENDOR_IO_TRIM_CNTRL_SEL_VREG, 0));
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/* Configure outbound tap value. */
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reg::ReadWrite(m_sdmmc_registers->vendor_clock_cntrl, SD_REG_BITS_VALUE(VENDOR_CLOCK_CNTRL_TRIM_VAL, this->GetOutboundTapValue()));
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/* Configure SPI_MODE_CLKEN_OVERRIDE. */
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reg::ReadWrite(m_sdmmc_registers->vendor_clock_cntrl, SD_REG_BITS_ENUM(VENDOR_CLOCK_CNTRL_SPI_MODE_CLKEN_OVERRIDE, NORMAL));
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/* Set slew codes. */
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this->SetSlewCodes();
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/* Set vref sel. */
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reg::ReadWrite(m_sdmmc_registers->sdmemcomppadctrl, SD_REG_BITS_VALUE(SDMEMCOMPPADCTRL_SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL, this->GetVrefSelValue()));
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/* Perform drive strength calibration at the new power. */
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this->SetDriveCodeOffsets(bus_power);
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this->CalibrateDriveStrength(bus_power);
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/* Enable internal clock. */
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R_TRY(SdHostStandardController::EnableInternalClock());
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R_SUCCEED();
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}
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Result SdmmcController::SetClockTrimmer(SpeedMode speed_mode, u8 tap_value) {
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/* If speed mode is Hs400, set the dqs trim value. */
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if (speed_mode == SpeedMode_MmcHs400) {
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reg::ReadWrite(m_sdmmc_registers->vendor_cap_overrides, SD_REG_BITS_VALUE(VENDOR_CAP_OVERRIDES_DQS_TRIM_VAL, 40));
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}
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/* Configure tap value as updated by software. */
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reg::ReadWrite(m_sdmmc_registers->vendor_tuning_cntrl0, SD_REG_BITS_ENUM(VENDOR_TUNING_CNTRL0_TAP_VALUE_UPDATED_BY_HW, NOT_UPDATED_BY_HW));
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/* Set the inbound tap value. */
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reg::ReadWrite(m_sdmmc_registers->vendor_clock_cntrl, SD_REG_BITS_VALUE(VENDOR_CLOCK_CNTRL_TAP_VAL, tap_value));
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/* Reset the cmd/dat line. */
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R_TRY(SdHostStandardController::ResetCmdDatLine());
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R_SUCCEED();
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}
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u8 SdmmcController::GetCurrentTapValue() {
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return static_cast<u8>(reg::GetValue(m_sdmmc_registers->vendor_clock_cntrl, SD_REG_BITS_MASK(VENDOR_CLOCK_CNTRL_TAP_VAL)));
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}
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Result SdmmcController::CalibrateDll() {
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/* Check if we need to temporarily re-enable the device clock. */
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const bool clock_disabled = reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, DISABLE));
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/* Ensure that the clock is enabled for the period we're using it. */
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if (clock_disabled) {
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/* Turn on the clock. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, ENABLE));
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}
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ON_SCOPE_EXIT { if (clock_disabled) { reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, DISABLE)); } };
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/* Begin calibration. */
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reg::ReadWrite(m_sdmmc_registers->vendor_dllcal_cfg, SD_REG_BITS_ENUM(VENDOR_DLLCAL_CFG_CALIBRATE, ENABLE));
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/* Wait up to 5ms for calibration to begin. */
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{
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ManualTimer timer(5);
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while (true) {
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/* If calibration is done, we're done. */
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if (!reg::HasValue(m_sdmmc_registers->vendor_dllcal_cfg, SD_REG_BITS_ENUM(VENDOR_DLLCAL_CFG_CALIBRATE, ENABLE))) {
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break;
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}
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/* Otherwise, check if we've timed out. */
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R_UNLESS((timer.Update()), sdmmc::ResultSdmmcDllCalibrationSoftwareTimeout());
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}
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}
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/* Wait up to 10ms for calibration to complete. */
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{
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ManualTimer timer(10);
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while (true) {
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/* If calibration is done, we're done. */
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if (reg::HasValue(m_sdmmc_registers->vendor_dllcal_cfg_sta, SD_REG_BITS_ENUM(VENDOR_DLLCAL_CFG_STA_DLL_CAL_ACTIVE, DONE))) {
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break;
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}
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/* Otherwise, check if we've timed out. */
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R_UNLESS((timer.Update()), sdmmc::ResultSdmmcDllApplicationSoftwareTimeout());
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}
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}
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R_SUCCEED();
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}
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Result SdmmcController::SetSpeedModeWithTapValue(SpeedMode speed_mode, u8 tap_value) {
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/* Check if we need to temporarily disable the device clock. */
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const bool clock_enabled = reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, ENABLE));
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/* Ensure that the clock is disabled for the period we're using it. */
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if (clock_enabled) {
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/* Turn off the clock. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, DISABLE));
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}
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/* Set clock trimmer. */
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/* NOTE: Nintendo does not re-enable the clock if this fails... */
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R_TRY(this->SetClockTrimmer(speed_mode, tap_value));
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/* Configure for the desired speed mode. */
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switch (speed_mode) {
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case SpeedMode_MmcIdentification:
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case SpeedMode_SdCardIdentification:
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case SpeedMode_MmcLegacySpeed:
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case SpeedMode_SdCardDefaultSpeed:
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/* Set as normal speed, 3.3V. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control, SD_REG_BITS_ENUM(HOST_CONTROL_HIGH_SPEED_ENABLE, NORMAL_SPEED));
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 3_3V_SIGNALING));
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break;
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case SpeedMode_MmcHighSpeed:
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case SpeedMode_SdCardHighSpeed:
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/* Set as high speed, 3.3V. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control, SD_REG_BITS_ENUM(HOST_CONTROL_HIGH_SPEED_ENABLE, HIGH_SPEED));
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 3_3V_SIGNALING));
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break;
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case SpeedMode_MmcHs200:
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/* Set as HS200, 1.8V. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_UHS_MODE_SELECT, HS200));
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 1_8V_SIGNALING));
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break;
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case SpeedMode_MmcHs400:
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/* Set as HS400, 1.8V. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_UHS_MODE_SELECT, HS400));
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 1_8V_SIGNALING));
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break;
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case SpeedMode_SdCardSdr12:
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/* Set as SDR12, 1.8V. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_UHS_MODE_SELECT, SDR12));
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 1_8V_SIGNALING));
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break;
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case SpeedMode_SdCardSdr50:
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case SpeedMode_SdCardSdr104:
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/* Set as SDR104, 1.8V. */
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reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_UHS_MODE_SELECT, SDR104));
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 1_8V_SIGNALING));
|
|
break;
|
|
case SpeedMode_GcAsicFpgaSpeed:
|
|
case SpeedMode_GcAsicSpeed:
|
|
/* Set as HS200, 1.8V. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_UHS_MODE_SELECT, HS200));
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 1_8V_SIGNALING));
|
|
break;
|
|
AMS_UNREACHABLE_DEFAULT_CASE();
|
|
}
|
|
SdHostStandardController::EnsureControl();
|
|
|
|
/* Get the divider setting. */
|
|
u32 target_source_clock_frequency_khz;
|
|
u16 x;
|
|
GetDividerSetting(std::addressof(target_source_clock_frequency_khz), std::addressof(x), speed_mode);
|
|
|
|
/* Set the clock frequency. */
|
|
u32 actual_source_clock_frequency_khz;
|
|
ClockResetController::SetClockFrequencyKHz(std::addressof(actual_source_clock_frequency_khz), this->GetClockResetModule(), target_source_clock_frequency_khz);
|
|
|
|
/* Set the device clock frequency. */
|
|
const u32 actual_device_clock_frequency_khz = util::DivideUp(actual_source_clock_frequency_khz, x);
|
|
SdHostStandardController::SetDeviceClockFrequencyKHz(actual_device_clock_frequency_khz);
|
|
|
|
/* Check that the divider is correct. */
|
|
AMS_ABORT_UNLESS((x == 1) || util::IsAligned(x, 2));
|
|
|
|
/* Write the divider val to clock control. */
|
|
const u16 n = x / 2;
|
|
const u16 upper_n = n >> 8;
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_VALUE(CLOCK_CONTROL_SDCLK_FREQUENCY_SELECT, n),
|
|
SD_REG_BITS_VALUE(CLOCK_CONTROL_UPPER_BITS_OF_SDCLK_FREQUENCY_SELECT, upper_n));
|
|
|
|
/* Re-enable the clock, if we should. */
|
|
if (clock_enabled) {
|
|
/* Turn on the clock. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, ENABLE));
|
|
}
|
|
|
|
/* If speed mode is Hs400, calibrate dll. */
|
|
if (speed_mode == SpeedMode_MmcHs400) {
|
|
R_TRY(this->CalibrateDll());
|
|
}
|
|
|
|
/* Set the current speed mode. */
|
|
m_current_speed_mode = speed_mode;
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
Result SdmmcController::IssueTuningCommand(u32 command_index) {
|
|
/* Check that we're not power saving enable. */
|
|
AMS_ABORT_UNLESS(!SdHostStandardController::IsPowerSavingEnable());
|
|
|
|
/* Wait until command inhibit is done. */
|
|
R_TRY(SdHostStandardController::WaitWhileCommandInhibit(true));
|
|
|
|
/* Set transfer for tuning. */
|
|
SdHostStandardController::SetTransferForTuning();
|
|
|
|
/* If necessary, clear interrupt and enable buffer read ready signal. */
|
|
#if defined(AMS_SDMMC_USE_OS_EVENTS)
|
|
{
|
|
this->ClearInterrupt();
|
|
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.normal_signal_enable, SD_REG_BITS_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, ENABLED));
|
|
}
|
|
#endif
|
|
|
|
/* Set the buffer read ready enable, and read status to ensure it takes. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.normal_int_enable, SD_REG_BITS_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, ENABLED));
|
|
reg::Write(m_sdmmc_registers->sd_host_standard_registers.normal_int_status, reg::Read(m_sdmmc_registers->sd_host_standard_registers.normal_int_status));
|
|
|
|
/* Issue command with clock disabled. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, DISABLE));
|
|
{
|
|
SdHostStandardController::SetCommandForTuning(command_index);
|
|
|
|
SdHostStandardController::EnsureControl();
|
|
WaitMicroSeconds(1);
|
|
static_cast<void>(SdHostStandardController::AbortTransaction());
|
|
}
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, ENABLE));
|
|
|
|
/* When we're done waiting, ensure that we clean up appropriately. */
|
|
ON_SCOPE_EXIT {
|
|
/* Clear the buffer read ready signal, if we should. */
|
|
#if defined(AMS_SDMMC_USE_OS_EVENTS)
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.normal_signal_enable, SD_REG_BITS_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, MASKED));
|
|
#endif
|
|
|
|
/* Clear the buffer read ready enable. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.normal_int_enable, SD_REG_BITS_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, MASKED));
|
|
|
|
/* Wait 8 clocks to ensure configuration takes. */
|
|
SdHostStandardController::EnsureControl();
|
|
WaitClocks(8, SdHostStandardController::GetDeviceClockFrequencyKHz());
|
|
};
|
|
|
|
/* Wait for the command to finish. */
|
|
#if defined(AMS_SDMMC_USE_OS_EVENTS)
|
|
{
|
|
const auto result = SdHostStandardController::WaitInterrupt(TuningCommandTimeoutMilliSeconds);
|
|
if (R_SUCCEEDED(result)) {
|
|
/* If we succeeded, clear the interrupt. */
|
|
reg::Write(m_sdmmc_registers->sd_host_standard_registers.normal_int_status, SD_REG_BITS_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, ENABLED));
|
|
this->ClearInterrupt();
|
|
R_SUCCEED();
|
|
} else if (sdmmc::ResultWaitInterruptSoftwareTimeout::Includes(result)) {
|
|
SdHostStandardController::AbortTransaction();
|
|
R_THROW(sdmmc::ResultIssueTuningCommandSoftwareTimeout());
|
|
} else {
|
|
R_RETURN(result);
|
|
}
|
|
}
|
|
#else
|
|
{
|
|
SdHostStandardController::EnsureControl();
|
|
ManualTimer timer(TuningCommandTimeoutMilliSeconds);
|
|
while (true) {
|
|
/* Check if we received the interrupt. */
|
|
if (reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.normal_int_status, SD_REG_BITS_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, ENABLED))) {
|
|
/* If we did, acknowledge it. */
|
|
reg::Write(m_sdmmc_registers->sd_host_standard_registers.normal_int_status, SD_REG_BITS_ENUM(NORMAL_INTERRUPT_BUFFER_READ_READY, ENABLED));
|
|
R_SUCCEED();
|
|
}
|
|
|
|
/* Otherwise, check if we timed out. */
|
|
if (!timer.Update()) {
|
|
static_cast<void>(SdHostStandardController::AbortTransaction());
|
|
R_THROW(sdmmc::ResultIssueTuningCommandSoftwareTimeout());
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void SdmmcController::SetDriveCodeOffsets(BusPower bus_power) {
|
|
/* Get the offsets. */
|
|
u8 pd, pu;
|
|
this->GetAutoCalOffsets(std::addressof(pd), std::addressof(pu), bus_power);
|
|
|
|
/* Set the offsets. */
|
|
reg::ReadWrite(m_sdmmc_registers->auto_cal_config, SD_REG_BITS_VALUE(AUTO_CAL_CONFIG_AUTO_CAL_PD_OFFSET, pd),
|
|
SD_REG_BITS_VALUE(AUTO_CAL_CONFIG_AUTO_CAL_PU_OFFSET, pu));
|
|
|
|
/* Wait for 1ms to ensure that our configuration takes. */
|
|
/* NOTE/HACK: Nintendo does not (need) to do this, but they use SvcSleepThread for waits. */
|
|
/* It's unclear why this wait is necessary, but not doing it causes drive strength calibration to fail if done immediately afterwards. */
|
|
util::WaitMicroSeconds(1000);
|
|
}
|
|
|
|
void SdmmcController::CalibrateDriveStrength(BusPower bus_power) {
|
|
/* Reset drive strength calibration status. */
|
|
m_drive_strength_calibration_status = sdmmc::ResultDriveStrengthCalibrationNotCompleted();
|
|
|
|
/* Check if we need to temporarily disable the device clock. */
|
|
const bool clock_enabled = reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, ENABLE));
|
|
|
|
/* Ensure that the clock is disabled for the period we're using it. */
|
|
if (clock_enabled) {
|
|
/* Turn off the clock. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, DISABLE));
|
|
}
|
|
|
|
/* Calibrate with the clock disabled. */
|
|
{
|
|
/* Set SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD. */
|
|
if (reg::HasValue(m_sdmmc_registers->sdmemcomppadctrl, SD_REG_BITS_VALUE(SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD, 0))) {
|
|
reg::ReadWrite(m_sdmmc_registers->sdmemcomppadctrl, SD_REG_BITS_VALUE(SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD, 1));
|
|
SdHostStandardController::EnsureControl();
|
|
WaitMicroSeconds(1);
|
|
}
|
|
|
|
/* Calibrate with SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD set. */
|
|
{
|
|
/* Begin autocal. */
|
|
reg::ReadWrite(m_sdmmc_registers->auto_cal_config, SD_REG_BITS_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_START, ENABLED),
|
|
SD_REG_BITS_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_ENABLE, ENABLED));
|
|
SdHostStandardController::EnsureControl();
|
|
WaitMicroSeconds(2);
|
|
|
|
/* Wait up to 10ms for auto cal to complete. */
|
|
ManualTimer timer(10);
|
|
while (true) {
|
|
/* Check if auto cal is inactive. */
|
|
if (reg::HasValue(m_sdmmc_registers->auto_cal_status, SD_REG_BITS_ENUM(AUTO_CAL_STATUS_AUTO_CAL_ACTIVE, INACTIVE))) {
|
|
/* Check the pullup status. */
|
|
const u32 pullup = (reg::GetValue(m_sdmmc_registers->auto_cal_status, SD_REG_BITS_MASK(AUTO_CAL_STATUS_AUTO_CAL_PULLUP))) & 0x1F;
|
|
if (pullup == 0x1F) {
|
|
m_drive_strength_calibration_status = sdmmc::ResultSdmmcCompShortToGnd();
|
|
}
|
|
if (pullup == 0) {
|
|
m_drive_strength_calibration_status = sdmmc::ResultSdmmcCompOpen();
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
/* Otherwise, check if we've timed out. */
|
|
if (!timer.Update()) {
|
|
m_drive_strength_calibration_status = sdmmc::ResultDriveStrengthCalibrationSoftwareTimeout();
|
|
|
|
this->SetDriveStrengthToDefaultValues(bus_power);
|
|
reg::ReadWrite(m_sdmmc_registers->auto_cal_config, SD_REG_BITS_ENUM(AUTO_CAL_CONFIG_AUTO_CAL_ENABLE, DISABLED));
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Clear SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD. */
|
|
reg::ReadWrite(m_sdmmc_registers->sdmemcomppadctrl, SD_REG_BITS_VALUE(SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD, 0));
|
|
}
|
|
|
|
/* Re-enable the clock, if we should. */
|
|
if (clock_enabled) {
|
|
/* Turn on the clock. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, ENABLE));
|
|
}
|
|
|
|
/* If calibration didn't receive a replacement error, set internal state to success. */
|
|
if (sdmmc::ResultDriveStrengthCalibrationNotCompleted::Includes(m_drive_strength_calibration_status)) {
|
|
m_drive_strength_calibration_status = ResultSuccess();
|
|
}
|
|
}
|
|
|
|
Result SdmmcController::Startup(BusPower bus_power, BusWidth bus_width, SpeedMode speed_mode, bool power_saving_enable) {
|
|
/* Verify that we're awake. */
|
|
AMS_ABORT_UNLESS(m_is_awake);
|
|
|
|
/* Release the controller from reset. */
|
|
this->ReleaseReset(speed_mode);
|
|
|
|
/* Mark that we're not shutdown. */
|
|
m_is_shutdown = false;
|
|
|
|
/* Power on the controller. */
|
|
R_TRY(this->PowerOn(bus_power));
|
|
|
|
/* Start up for the specific power. */
|
|
R_TRY(this->StartupCore(bus_power));
|
|
|
|
/* Set our current power/width/speed. */
|
|
SdHostStandardController::SetBusWidth(bus_width);
|
|
SdHostStandardController::SetBusPower(bus_power);
|
|
R_TRY(this->SetSpeedMode(speed_mode));
|
|
this->SetPowerSaving(power_saving_enable);
|
|
|
|
/* Enable clock to the device. */
|
|
SdHostStandardController::EnableDeviceClock();
|
|
|
|
/* Ensure that we can control the device. */
|
|
SdHostStandardController::EnsureControl();
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void SdmmcController::Shutdown() {
|
|
/* If we're already shut down, there's nothing to do. */
|
|
if (m_is_shutdown) {
|
|
return;
|
|
}
|
|
|
|
/* If we're currently awake, we need to disable clock/power. */
|
|
if (m_is_awake) {
|
|
SdHostStandardController::DisableDeviceClock();
|
|
SdHostStandardController::SetBusPower(BusPower_Off);
|
|
SdHostStandardController::EnsureControl();
|
|
}
|
|
|
|
/* Power off. */
|
|
this->PowerOff();
|
|
|
|
/* If awake, assert reset. */
|
|
if (m_is_awake) {
|
|
this->AssertReset();
|
|
}
|
|
|
|
/* Mark that we're shutdown. */
|
|
m_is_shutdown = true;
|
|
}
|
|
|
|
void SdmmcController::PutToSleep() {
|
|
/* If we're already shut down or asleep, there's nothing to do. */
|
|
if (m_is_shutdown || !m_is_awake) {
|
|
return;
|
|
}
|
|
|
|
/* Save values before sleep. */
|
|
m_bus_power_before_sleep = SdHostStandardController::GetBusPower();
|
|
m_bus_width_before_sleep = SdHostStandardController::GetBusWidth();
|
|
m_speed_mode_before_sleep = m_current_speed_mode;
|
|
m_tap_value_before_sleep = this->GetCurrentTapValue();
|
|
m_is_powersaving_enable_before_sleep = SdHostStandardController::IsPowerSavingEnable();
|
|
|
|
/* Disable clock/power to the device. */
|
|
SdHostStandardController::DisableDeviceClock();
|
|
SdHostStandardController::SetBusPower(BusPower_Off);
|
|
SdHostStandardController::EnsureControl();
|
|
|
|
/* Assert reset. */
|
|
this->AssertReset();
|
|
|
|
/* Mark that we're asleep. */
|
|
m_is_awake = false;
|
|
}
|
|
|
|
Result SdmmcController::Awaken() {
|
|
/* If we're shut down, or if we're awake already, there's nothing to do. */
|
|
R_SUCCEED_IF(m_is_shutdown);
|
|
R_SUCCEED_IF(m_is_awake);
|
|
|
|
/* Mark that we're awake. */
|
|
m_is_awake = true;
|
|
|
|
/* Clear pad parked status. */
|
|
this->ClearPadParked();
|
|
|
|
/* Release reset. */
|
|
this->ReleaseReset(m_speed_mode_before_sleep);
|
|
|
|
/* Start up for the correct power. */
|
|
R_TRY(this->StartupCore(m_bus_power_before_sleep));
|
|
|
|
/* Configure values to what they were before sleep. */
|
|
SdHostStandardController::SetBusWidth(m_bus_width_before_sleep);
|
|
SdHostStandardController::SetBusPower(m_bus_power_before_sleep);
|
|
R_TRY(this->SetSpeedModeWithTapValue(m_speed_mode_before_sleep, m_tap_value_before_sleep));
|
|
this->SetPowerSaving(m_is_powersaving_enable_before_sleep);
|
|
|
|
/* Enable clock to the device. */
|
|
SdHostStandardController::EnableDeviceClock();
|
|
SdHostStandardController::EnsureControl();
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
Result SdmmcController::SwitchToSdr12() {
|
|
/* Disable clock. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, DISABLE));
|
|
|
|
/* Check that the dat lines are all low. */
|
|
R_UNLESS(reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.present_state, SD_REG_BITS_VALUE(PRESENT_STATE_DAT0_3_LINE_SIGNAL_LEVEL, 0b0000)), sdmmc::ResultSdCardNotReadyToVoltageSwitch());
|
|
|
|
/* Set Speed Mode. */
|
|
R_TRY(this->SetSpeedMode(SpeedMode_SdCardSdr12));
|
|
|
|
/* Set voltage to 1.8V. */
|
|
SdHostStandardController::EnsureControl();
|
|
R_TRY(this->LowerBusPower());
|
|
this->SetSchmittTrigger(BusPower_1_8V);
|
|
|
|
/* Perform drive strength calibration at the new power. */
|
|
this->SetDriveCodeOffsets(BusPower_1_8V);
|
|
this->CalibrateDriveStrength(BusPower_1_8V);
|
|
|
|
/* Set the bus power in standard controller. */
|
|
SdHostStandardController::SetBusPower(BusPower_1_8V);
|
|
|
|
/* Wait up to 5ms for the switch to take. */
|
|
SdHostStandardController::EnsureControl();
|
|
WaitMicroSeconds(5000);
|
|
|
|
/* Check that we switched to 1.8V. */
|
|
R_UNLESS(reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_1_8V_SIGNALING_ENABLE, 1_8V_SIGNALING)), sdmmc::ResultSdHostStandardFailSwitchTo1_8V());
|
|
|
|
/* Enable clock, and wait 1ms. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.clock_control, SD_REG_BITS_ENUM(CLOCK_CONTROL_SD_CLOCK_ENABLE, ENABLE));
|
|
SdHostStandardController::EnsureControl();
|
|
WaitMicroSeconds(1000);
|
|
|
|
/* Check that the dat lines are all high. */
|
|
R_UNLESS(reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.present_state, SD_REG_BITS_VALUE(PRESENT_STATE_DAT0_3_LINE_SIGNAL_LEVEL, 0b1111)), sdmmc::ResultSdCardNotCompleteVoltageSwitch());
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
Result SdmmcController::SetSpeedMode(SpeedMode speed_mode) {
|
|
/* Get the tap value. */
|
|
u8 tap_value;
|
|
if (speed_mode == SpeedMode_MmcHs400) {
|
|
AMS_ABORT_UNLESS(m_is_valid_tap_value_for_hs_400);
|
|
tap_value = m_tap_value_for_hs_400;
|
|
} else {
|
|
tap_value = this->GetDefaultInboundTapValue();
|
|
}
|
|
|
|
/* Set the speed mode. */
|
|
R_TRY(this->SetSpeedModeWithTapValue(speed_mode, tap_value));
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void SdmmcController::SetPowerSaving(bool en) {
|
|
/* If necessary, calibrate the drive strength. */
|
|
if (this->IsNeedPeriodicDriveStrengthCalibration() && !en && SdHostStandardController::IsDeviceClockEnable()) {
|
|
this->CalibrateDriveStrength(SdHostStandardController::GetBusPower());
|
|
}
|
|
|
|
return SdHostStandardController::SetPowerSaving(en);
|
|
}
|
|
|
|
void SdmmcController::EnableDeviceClock() {
|
|
/* If necessary, calibrate the drive strength. */
|
|
if (this->IsNeedPeriodicDriveStrengthCalibration() && !SdHostStandardController::IsPowerSavingEnable()) {
|
|
this->CalibrateDriveStrength(SdHostStandardController::GetBusPower());
|
|
}
|
|
|
|
return SdHostStandardController::EnableDeviceClock();
|
|
}
|
|
|
|
Result SdmmcController::IssueCommand(const Command *command, TransferData *xfer_data, u32 *out_num_transferred_blocks) {
|
|
/* If necessary, calibrate the drive strength. */
|
|
if (this->IsNeedPeriodicDriveStrengthCalibration() && SdHostStandardController::IsPowerSavingEnable()) {
|
|
this->CalibrateDriveStrength(SdHostStandardController::GetBusPower());
|
|
}
|
|
|
|
R_RETURN(SdHostStandardController::IssueCommand(command, xfer_data, out_num_transferred_blocks));
|
|
}
|
|
|
|
Result SdmmcController::IssueStopTransmissionCommand(u32 *out_response) {
|
|
/* If necessary, calibrate the drive strength. */
|
|
if (this->IsNeedPeriodicDriveStrengthCalibration() && SdHostStandardController::IsPowerSavingEnable()) {
|
|
this->CalibrateDriveStrength(SdHostStandardController::GetBusPower());
|
|
}
|
|
|
|
R_RETURN(SdHostStandardController::IssueStopTransmissionCommand(out_response));
|
|
}
|
|
|
|
Result SdmmcController::Tuning(SpeedMode speed_mode, u32 command_index) {
|
|
/* Clear vendor tuning control 1. */
|
|
reg::Write(m_sdmmc_registers->vendor_tuning_cntrl1, 0);
|
|
|
|
/* Determine/configure the number of tries. */
|
|
int num_tries;
|
|
switch (speed_mode) {
|
|
case SpeedMode_MmcHs200:
|
|
case SpeedMode_MmcHs400:
|
|
case SpeedMode_SdCardSdr104:
|
|
num_tries = 128;
|
|
reg::ReadWrite(m_sdmmc_registers->vendor_tuning_cntrl0, SD_REG_BITS_ENUM(VENDOR_TUNING_CNTRL0_NUM_TUNING_ITERATIONS, TRIES_128));
|
|
break;
|
|
case SpeedMode_SdCardSdr50:
|
|
case SpeedMode_GcAsicFpgaSpeed:
|
|
case SpeedMode_GcAsicSpeed:
|
|
num_tries = 256;
|
|
reg::ReadWrite(m_sdmmc_registers->vendor_tuning_cntrl0, SD_REG_BITS_ENUM(VENDOR_TUNING_CNTRL0_NUM_TUNING_ITERATIONS, TRIES_256));
|
|
break;
|
|
AMS_UNREACHABLE_DEFAULT_CASE();
|
|
}
|
|
|
|
/* Configure the multiplier. */
|
|
reg::ReadWrite(m_sdmmc_registers->vendor_tuning_cntrl0, SD_REG_BITS_VALUE(VENDOR_TUNING_CNTRL0_MUL_M, 1));
|
|
|
|
/* Configure tap value to be updated by hardware. */
|
|
reg::ReadWrite(m_sdmmc_registers->vendor_tuning_cntrl0, SD_REG_BITS_ENUM(VENDOR_TUNING_CNTRL0_TAP_VALUE_UPDATED_BY_HW, UPDATED_BY_HW));
|
|
|
|
/* Configure to execute tuning. */
|
|
reg::ReadWrite(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_EXECUTE_TUNING, EXECUTE_TUNING));
|
|
|
|
/* Perform tuning num_tries times. */
|
|
for (int i = 0; /* ... */; ++i) {
|
|
/* Check if we've been removed. */
|
|
R_TRY(this->CheckRemoved());
|
|
|
|
/* Issue the command. */
|
|
/* NOTE: Nintendo does not check the result of this call. */
|
|
static_cast<void>(this->IssueTuningCommand(command_index));
|
|
|
|
/* Check if tuning is done. */
|
|
if (i >= num_tries) {
|
|
break;
|
|
}
|
|
|
|
if (reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_EXECUTE_TUNING, TUNING_COMPLETED))) {
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Check if we're using the tuned clock. */
|
|
R_UNLESS(reg::HasValue(m_sdmmc_registers->sd_host_standard_registers.host_control2, SD_REG_BITS_ENUM(HOST_CONTROL2_SAMPLING_CLOCK, USING_TUNED_CLOCK)), sdmmc::ResultTuningFailed());
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void SdmmcController::SaveTuningStatusForHs400() {
|
|
/* Save the current tap value. */
|
|
m_tap_value_for_hs_400 = GetCurrentTapValue();
|
|
m_is_valid_tap_value_for_hs_400 = true;
|
|
}
|
|
|
|
Result Sdmmc1Controller::PowerOnForRegisterControl(BusPower bus_power) {
|
|
AMS_ABORT_UNLESS(bus_power == BusPower_3_3V);
|
|
|
|
/* Nintendo sets the current bus power regardless of whether the call succeeds. */
|
|
ON_SCOPE_EXIT { m_current_bus_power = BusPower_3_3V; };
|
|
|
|
/* pcv::PowerOn(pcv::PowerControlTarget_SdCard, 3300000); */
|
|
R_TRY(m_power_controller->PowerOn(BusPower_3_3V));
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void Sdmmc1Controller::PowerOffForRegisterControl() {
|
|
/* If we're already off, there's nothing to do. */
|
|
if (m_current_bus_power == BusPower_Off) {
|
|
return;
|
|
}
|
|
|
|
/* If we're at 3.3V, lower to 1.8V. */
|
|
if (m_current_bus_power == BusPower_3_3V) {
|
|
/* pcv::ChangeVoltage(pcv::PowerControlTarget_SdCard, 1800000); */
|
|
/* NOTE: Nintendo does not check the result of this call. */
|
|
static_cast<void>(m_power_controller->LowerBusPower());
|
|
|
|
/* Set our bus power. */
|
|
m_current_bus_power = BusPower_1_8V;
|
|
}
|
|
|
|
/* pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1OutputHigh); */
|
|
pinmux_impl::SetPinAssignment(pinmux_impl::PinAssignment_Sdmmc1OutputHigh);
|
|
|
|
|
|
/* pcv::PowerOff(pcv::PowerControlTarget_SdCard); */
|
|
/* NOTE: Nintendo does not check the result of this call. */
|
|
static_cast<void>(m_power_controller->PowerOff());
|
|
|
|
/* Set our bus power. */
|
|
m_current_bus_power = BusPower_Off;
|
|
|
|
/* pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1ResetState); */
|
|
pinmux_impl::SetPinAssignment(pinmux_impl::PinAssignment_Sdmmc1ResetState);
|
|
}
|
|
|
|
Result Sdmmc1Controller::LowerBusPowerForRegisterControl() {
|
|
/* Nintendo sets the current bus power regardless of whether the call succeeds. */
|
|
ON_SCOPE_EXIT { m_current_bus_power = BusPower_1_8V; };
|
|
|
|
/* pcv::ChangeVoltage(pcv::PowerControlTarget_SdCard, 1800000); */
|
|
R_TRY(m_power_controller->LowerBusPower());
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void Sdmmc1Controller::SetSchmittTriggerForRegisterControl(BusPower bus_power) {
|
|
SdHostStandardController::EnsureControl();
|
|
|
|
if (IsSocMariko()) {
|
|
/* pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1SchmtEnable); */
|
|
pinmux_impl::SetPinAssignment(pinmux_impl::PinAssignment_Sdmmc1SchmtEnable);
|
|
} else {
|
|
switch (bus_power) {
|
|
case BusPower_1_8V:
|
|
/* pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1SchmtEnable); */
|
|
pinmux_impl::SetPinAssignment(pinmux_impl::PinAssignment_Sdmmc1SchmtEnable);
|
|
break;
|
|
case BusPower_3_3V:
|
|
/* pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1SchmtDisable); */
|
|
pinmux_impl::SetPinAssignment(pinmux_impl::PinAssignment_Sdmmc1SchmtDisable);
|
|
break;
|
|
case BusPower_Off:
|
|
AMS_UNREACHABLE_DEFAULT_CASE();
|
|
}
|
|
}
|
|
}
|
|
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
Result Sdmmc1Controller::PowerOnForPcvControl(BusPower bus_power) {
|
|
AMS_ABORT_UNLESS(bus_power == BusPower_3_3V);
|
|
|
|
/* Nintendo sets the current bus power regardless of whether the call succeeds. */
|
|
ON_SCOPE_EXIT { m_current_bus_power = BusPower_3_3V; };
|
|
|
|
/* TODO: R_RETURN(pcv::PowerOn(pcv::PowerControlTarget_SdCard, 3300000)); */
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void Sdmmc1Controller::PowerOffForPcvControl() {
|
|
/* If we're already off, there's nothing to do. */
|
|
if (m_current_bus_power == BusPower_Off) {
|
|
return;
|
|
}
|
|
|
|
/* If we're at 3.3V, lower to 1.8V. */
|
|
{
|
|
/* TODO: pcv::ChangeVoltage(pcv::PowerControlTarget_SdCard, 1800000); */
|
|
m_current_bus_power = BusPower_1_8V;
|
|
}
|
|
|
|
/* TODO: pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1OutputHigh); */
|
|
|
|
/* TODO: pcv::PowerOff(pcv::PowerControlTarget_SdCard); */
|
|
m_current_bus_power = BusPower_Off;
|
|
|
|
/* TODO: pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1ResetState); */
|
|
|
|
}
|
|
|
|
Result Sdmmc1Controller::LowerBusPowerForPcvControl() {
|
|
/* Nintendo sets the current bus power regardless of whether the call succeeds. */
|
|
ON_SCOPE_EXIT { m_current_bus_power = BusPower_1_8V; };
|
|
|
|
/* TODO: R_RETURN(pcv::ChangeVoltage(pcv::PowerControlTarget_SdCard, 1800000)); */
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void Sdmmc1Controller::SetSchmittTriggerForPcvControl(BusPower bus_power) {
|
|
SdHostStandardController::EnsureControl();
|
|
|
|
if (IsSocMariko()) {
|
|
/* TODO: pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1SchmtEnable); */
|
|
} else {
|
|
switch (bus_power) {
|
|
case BusPower_1_8V:
|
|
/* TODO: pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1SchmtEnable); */
|
|
break;
|
|
case BusPower_3_3V:
|
|
/* TODO: pinmux::SetPinAssignment(std::addressof(m_pinmux_session), pinmux::PinAssignment_Sdmmc1SchmtDisable); */
|
|
break;
|
|
case BusPower_Off:
|
|
AMS_UNREACHABLE_DEFAULT_CASE();
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
Result Sdmmc1Controller::PowerOn(BusPower bus_power) {
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
if (m_is_pcv_control) {
|
|
R_RETURN(this->PowerOnForPcvControl(bus_power));
|
|
} else
|
|
#endif
|
|
{
|
|
R_RETURN(this->PowerOnForRegisterControl(bus_power));
|
|
}
|
|
}
|
|
|
|
void Sdmmc1Controller::PowerOff() {
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
if (m_is_pcv_control) {
|
|
return this->PowerOffForPcvControl();
|
|
} else
|
|
#endif
|
|
{
|
|
return this->PowerOffForRegisterControl();
|
|
}
|
|
}
|
|
|
|
Result Sdmmc1Controller::LowerBusPower() {
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
if (m_is_pcv_control) {
|
|
R_RETURN(this->LowerBusPowerForPcvControl());
|
|
} else
|
|
#endif
|
|
{
|
|
R_RETURN(this->LowerBusPowerForRegisterControl());
|
|
}
|
|
}
|
|
|
|
void Sdmmc1Controller::SetSchmittTrigger(BusPower bus_power) {
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
if (m_is_pcv_control) {
|
|
return this->SetSchmittTriggerForPcvControl(bus_power);
|
|
} else
|
|
#endif
|
|
{
|
|
return this->SetSchmittTriggerForRegisterControl(bus_power);
|
|
}
|
|
}
|
|
|
|
void Sdmmc1Controller::Initialize() {
|
|
return this->InitializeForRegisterControl();
|
|
}
|
|
|
|
void Sdmmc1Controller::Finalize() {
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
if (m_is_pcv_control) {
|
|
return this->FinalizeForPcvControl();
|
|
} else
|
|
#endif
|
|
{
|
|
return this->FinalizeForRegisterControl();
|
|
}
|
|
}
|
|
|
|
void Sdmmc1Controller::InitializeForRegisterControl() {
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
/* Mark ourselves as initialized by register control. */
|
|
m_is_pcv_control = false;
|
|
#endif
|
|
|
|
/* pinmux::Initialize(); */
|
|
/* This just opens a session handle to pinmux service, no work to do. */
|
|
|
|
/* pinmux::OpenSession(std::addressof(m_pinmux_session), pinmux::AssignablePinGroupName_Sdmmc1); */
|
|
/* This just sets the session's internal value to the pin group name, so nothing to do here either. */
|
|
|
|
/* pcv::Initialize(); */
|
|
/* This initializes a lot of globals in pcv, most of which we don't care about. */
|
|
/* However, we do care about the Sdmmc1PowerController. */
|
|
AMS_ABORT_UNLESS(m_power_controller == nullptr);
|
|
m_power_controller = util::ConstructAt(m_power_controller_storage);
|
|
|
|
/* Perform base initialization. */
|
|
SdmmcController::Initialize();
|
|
}
|
|
|
|
void Sdmmc1Controller::FinalizeForRegisterControl() {
|
|
/* Perform base finalization. */
|
|
SdmmcController::Finalize();
|
|
|
|
/* pcv::Finalize(); */
|
|
/* As with initialize, we mostly don't care about the globals this touches. */
|
|
/* However, we do want to finalize the Sdmmc1PowerController. */
|
|
AMS_ABORT_UNLESS(m_power_controller != nullptr);
|
|
m_power_controller = nullptr;
|
|
util::DestroyAt(m_power_controller_storage);
|
|
|
|
/* pinmux::CloseSession(std::addressof(m_pinmux_session)); */
|
|
/* This does nothing. */
|
|
|
|
/* pinmux::Finalize(); */
|
|
/* This does nothing. */
|
|
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
/* Mark ourselves as initialized by register control. */
|
|
m_is_pcv_control = false;
|
|
#endif
|
|
}
|
|
|
|
#if defined(AMS_SDMMC_USE_PCV_CLOCK_RESET_CONTROL)
|
|
void Sdmmc1Controller::InitializeForPcvControl() {
|
|
/* Mark ourselves as initialized by pcv control. */
|
|
m_is_pcv_control = true;
|
|
|
|
/* TODO: pinmux::Initialize(); */
|
|
/* TODO: pinmux::OpenSession(std::addressof(m_pinmux_session), pinmux::AssignablePinGroupName_Sdmmc1); */
|
|
/* TODO: pcv::Initialize(); */
|
|
|
|
/* Perform base initialization. */
|
|
SdmmcController::Initialize();
|
|
}
|
|
|
|
void Sdmmc1Controller::FinalizeForPcvControl() {
|
|
/* Perform base finalization. */
|
|
SdmmcController::Finalize();
|
|
|
|
/* TODO: pcv::Finalize(); */
|
|
/* TODO: pinmux::CloseSession(std::addressof(m_pinmux_session)); */
|
|
/* TODO: pinmux::Finalize(); */
|
|
|
|
/* Mark ourselves as initialized by register control. */
|
|
m_is_pcv_control = false;
|
|
}
|
|
#endif
|
|
|
|
namespace {
|
|
|
|
constexpr inline dd::PhysicalAddress PmcRegistersPhysicalAddress = 0x7000E400;
|
|
|
|
}
|
|
|
|
Result Sdmmc1Controller::PowerController::ControlVddioSdmmc1(BusPower bus_power) {
|
|
/* Configure appropriate voltage. */
|
|
switch (bus_power) {
|
|
case BusPower_Off:
|
|
R_TRY(SetSdCardVoltageEnabled(false));
|
|
break;
|
|
case BusPower_1_8V:
|
|
R_TRY(SetSdCardVoltageValue(1'800'000));
|
|
R_TRY(SetSdCardVoltageEnabled(true));
|
|
break;
|
|
case BusPower_3_3V:
|
|
R_TRY(SetSdCardVoltageValue(3'300'000));
|
|
R_TRY(SetSdCardVoltageEnabled(true));
|
|
break;
|
|
AMS_UNREACHABLE_DEFAULT_CASE();
|
|
}
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
void Sdmmc1Controller::PowerController::SetSdmmcIoMode(bool is_3_3V) {
|
|
/* Determine the address we're updating. */
|
|
constexpr dd::PhysicalAddress ApbdevPmcPwrDetValAddress = PmcRegistersPhysicalAddress + APBDEV_PMC_PWR_DET_VAL;
|
|
|
|
/* Read the current value. */
|
|
u32 value = dd::ReadIoRegister(ApbdevPmcPwrDetValAddress);
|
|
|
|
/* Mask out the existing bits. */
|
|
value &= ~(reg::EncodeMask(PMC_REG_BITS_MASK(PWR_DET_VAL_SDMMC1)));
|
|
|
|
/* ORR in the new bits. */
|
|
value |= reg::Encode(PMC_REG_BITS_ENUM_SEL(PWR_DET_VAL_SDMMC1, is_3_3V, ENABLE, DISABLE));
|
|
|
|
/* Write the new value. */
|
|
dd::WriteIoRegister(ApbdevPmcPwrDetValAddress, value);
|
|
|
|
/* Read the value back to be sure our write takes. */
|
|
dd::ReadIoRegister(ApbdevPmcPwrDetValAddress);
|
|
}
|
|
|
|
void Sdmmc1Controller::PowerController::ControlRailSdmmc1Io(bool is_power_on) {
|
|
/* Determine the address we're updating. */
|
|
constexpr dd::PhysicalAddress ApbdevPmcNoIoPowerAddress = PmcRegistersPhysicalAddress + APBDEV_PMC_NO_IOPOWER;
|
|
|
|
/* Read the current value. */
|
|
u32 value = dd::ReadIoRegister(ApbdevPmcNoIoPowerAddress);
|
|
|
|
/* Mask out the existing bits. */
|
|
value &= ~(reg::EncodeMask(PMC_REG_BITS_MASK(NO_IOPOWER_SDMMC1)));
|
|
|
|
/* ORR in the new bits. */
|
|
value |= reg::Encode(PMC_REG_BITS_ENUM_SEL(NO_IOPOWER_SDMMC1, is_power_on, DISABLE, ENABLE));
|
|
|
|
/* Write the new value. */
|
|
dd::WriteIoRegister(ApbdevPmcNoIoPowerAddress, value);
|
|
|
|
/* Read the value back to be sure our write takes. */
|
|
dd::ReadIoRegister(ApbdevPmcNoIoPowerAddress);
|
|
}
|
|
|
|
Sdmmc1Controller::PowerController::PowerController() : m_current_bus_power(BusPower_Off) {
|
|
/* gpio::Initialize(); */
|
|
/* ... */
|
|
|
|
/* Open gpio session. */
|
|
/* gpio::OpenSession(std::addressof(m_gpio_pad_session), gpio::GpioPadName_PowSdEn); */
|
|
gpio_impl::OpenSession(gpio_impl::GpioPadName_PowSdEn);
|
|
|
|
/* Configure the gpio as low/output. */
|
|
/* gpio::SetValue(std::addressof(m_gpio_pad_session), gpio::GpioValue_Low); */
|
|
gpio_impl::SetValue(gpio_impl::GpioPadName_PowSdEn, gpio_impl::GpioValue_Low);
|
|
|
|
/* gpio::SetDirection(std::addressof(m_gpio_pad_session), gpio::Direction_Output); */
|
|
gpio_impl::SetDirection(gpio_impl::GpioPadName_PowSdEn, gpio_impl::Direction_Output);
|
|
}
|
|
|
|
Sdmmc1Controller::PowerController::~PowerController() {
|
|
/* gpio::CloseSession(std::addressof(m_gpio_pad_session)); */
|
|
gpio_impl::CloseSession(gpio_impl::GpioPadName_PowSdEn);
|
|
|
|
/* gpio::Finalize(); */
|
|
/* ... */
|
|
}
|
|
|
|
Result Sdmmc1Controller::PowerController::PowerOn(BusPower bus_power) {
|
|
/* Bus power should be off, and if it's not we don't need to do anything. */
|
|
AMS_ASSERT(m_current_bus_power == BusPower_Off);
|
|
R_SUCCEED_IF(m_current_bus_power != BusPower_Off);
|
|
|
|
/* Power on requires the target bus power be 3.3V. */
|
|
AMS_ABORT_UNLESS(bus_power == BusPower_3_3V);
|
|
|
|
/* Enable the rail. */
|
|
this->ControlRailSdmmc1Io(true);
|
|
|
|
/* Set the SD power GPIO to high. */
|
|
/* gpio::SetValue(std::addressof(m_gpio_pad_session), gpio::GpioValue_High); */
|
|
gpio_impl::SetValue(gpio_impl::GpioPadName_PowSdEn, gpio_impl::GpioValue_High);
|
|
|
|
/* Wait 10ms for power change to take. */
|
|
WaitMicroSeconds(10000);
|
|
|
|
/* Configure Sdmmc1 IO as 3.3V. */
|
|
this->SetSdmmcIoMode(true);
|
|
R_TRY(this->ControlVddioSdmmc1(BusPower_3_3V));
|
|
|
|
/* Wait 130 us for changes to take. */
|
|
WaitMicroSeconds(130);
|
|
|
|
/* Update our current bus power. */
|
|
m_current_bus_power = bus_power;
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
Result Sdmmc1Controller::PowerController::PowerOff() {
|
|
/* Bus power should be on, and if it's not we don't need to do anything. */
|
|
AMS_ASSERT(m_current_bus_power != BusPower_Off);
|
|
R_SUCCEED_IF(m_current_bus_power == BusPower_Off);
|
|
|
|
/* Bus power should be 1.8V. */
|
|
/* NOTE: the result returned here is 0x8C0 (regulator::ResultIllegalRequest()) on newer firmwares. */
|
|
AMS_ASSERT(m_current_bus_power == BusPower_1_8V);
|
|
R_UNLESS(m_current_bus_power == BusPower_1_8V, pcv::ResultIllegalRequest());
|
|
|
|
/* Disable vddio, and wait 4 ms. */
|
|
/* NOTE: Nintendo does not check the result of this call. */
|
|
static_cast<void>(this->ControlVddioSdmmc1(BusPower_Off));
|
|
WaitMicroSeconds(4000);
|
|
|
|
/* Set the SD power GPIO to low. */
|
|
/* gpio::SetValue(std::addressof(m_gpio_pad_session), gpio::GpioValue_Low); */
|
|
gpio_impl::SetValue(gpio_impl::GpioPadName_PowSdEn, gpio_impl::GpioValue_Low);
|
|
|
|
/* Wait 239ms for the gpio config to take. */
|
|
WaitMicroSeconds(239000);
|
|
|
|
/* Disable the rail. */
|
|
this->ControlRailSdmmc1Io(false);
|
|
this->SetSdmmcIoMode(true);
|
|
|
|
/* Update our current bus power. */
|
|
m_current_bus_power = BusPower_Off;
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
Result Sdmmc1Controller::PowerController::LowerBusPower() {
|
|
/* Bus power should be 3.3V, and if it's not we don't need to do anything. */
|
|
AMS_ASSERT(m_current_bus_power == BusPower_3_3V);
|
|
R_SUCCEED_IF(m_current_bus_power != BusPower_3_3V);
|
|
|
|
/* Configure as 1.8V, then wait 150us for it to take. */
|
|
R_TRY(this->ControlVddioSdmmc1(BusPower_1_8V));
|
|
WaitMicroSeconds(150);
|
|
this->SetSdmmcIoMode(false);
|
|
|
|
/* Update our current bus power. */
|
|
m_current_bus_power = BusPower_1_8V;
|
|
|
|
R_SUCCEED();
|
|
}
|
|
|
|
}
|