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https://github.com/Atmosphere-NX/Atmosphere-libs.git
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kern: bump svc limit to 192 from 128
This commit is contained in:
parent
b92376192c
commit
af72072313
@ -0,0 +1,27 @@
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/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#define THREAD_STACK_PARAMETERS_SIZE 0x30
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#define THREAD_STACK_PARAMETERS_SVC_PERMISSION 0x00
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#define THREAD_STACK_PARAMETERS_CONTEXT 0x18
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#define THREAD_STACK_PARAMETERS_CUR_THREAD 0x20
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#define THREAD_STACK_PARAMETERS_DISABLE_COUNT 0x28
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#define THREAD_STACK_PARAMETERS_DPC_FLAGS 0x2A
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#define THREAD_STACK_PARAMETERS_CURRENT_SVC_ID 0x2B
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#define THREAD_STACK_PARAMETERS_IS_CALLING_SVC 0x2C
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#define THREAD_STACK_PARAMETERS_IS_IN_EXCEPTION_HANDLER 0x2D
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#define THREAD_STACK_PARAMETERS_IS_PINNED 0x2E
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@ -17,6 +17,7 @@
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#include <vapours.hpp>
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#include <vapours.hpp>
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#include <mesosphere/kern_build_config.hpp>
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#include <mesosphere/kern_build_config.hpp>
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#include <mesosphere/svc/kern_svc_results.hpp>
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#include <mesosphere/svc/kern_svc_results.hpp>
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#include <mesosphere/kern_select_assembly_offsets.h>
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namespace ams::kern {
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namespace ams::kern {
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@ -82,17 +82,28 @@ namespace ams::kern {
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};
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};
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struct StackParameters {
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struct StackParameters {
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alignas(0x10) u8 svc_permission[0x10];
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alignas(0x10) u8 svc_permission[0x18];
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KThreadContext *context;
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KThread *cur_thread;
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s16 disable_count;
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std::atomic<u8> dpc_flags;
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std::atomic<u8> dpc_flags;
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u8 current_svc_id;
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u8 current_svc_id;
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bool is_calling_svc;
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bool is_calling_svc;
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bool is_in_exception_handler;
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bool is_in_exception_handler;
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bool is_pinned;
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bool is_pinned;
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s32 disable_count;
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KThreadContext *context;
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KThread *cur_thread;
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};
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};
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static_assert(alignof(StackParameters) == 0x10);
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static_assert(alignof(StackParameters) == 0x10);
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static_assert(sizeof(StackParameters) == THREAD_STACK_PARAMETERS_SIZE);
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static_assert(__builtin_offsetof(StackParameters, svc_permission) == THREAD_STACK_PARAMETERS_SVC_PERMISSION);
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static_assert(__builtin_offsetof(StackParameters, context) == THREAD_STACK_PARAMETERS_CONTEXT);
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static_assert(__builtin_offsetof(StackParameters, cur_thread) == THREAD_STACK_PARAMETERS_CUR_THREAD);
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static_assert(__builtin_offsetof(StackParameters, disable_count) == THREAD_STACK_PARAMETERS_DISABLE_COUNT);
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static_assert(__builtin_offsetof(StackParameters, dpc_flags) == THREAD_STACK_PARAMETERS_DPC_FLAGS);
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static_assert(__builtin_offsetof(StackParameters, current_svc_id) == THREAD_STACK_PARAMETERS_CURRENT_SVC_ID);
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static_assert(__builtin_offsetof(StackParameters, is_calling_svc) == THREAD_STACK_PARAMETERS_IS_CALLING_SVC);
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static_assert(__builtin_offsetof(StackParameters, is_in_exception_handler) == THREAD_STACK_PARAMETERS_IS_IN_EXCEPTION_HANDLER);
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static_assert(__builtin_offsetof(StackParameters, is_pinned) == THREAD_STACK_PARAMETERS_IS_PINNED);
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struct QueueEntry {
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struct QueueEntry {
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private:
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private:
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@ -251,7 +262,7 @@ namespace ams::kern {
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return *(reinterpret_cast<StackParameters *>(m_kernel_stack_top) - 1);
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return *(reinterpret_cast<StackParameters *>(m_kernel_stack_top) - 1);
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}
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}
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public:
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public:
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ALWAYS_INLINE s32 GetDisableDispatchCount() const {
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ALWAYS_INLINE s16 GetDisableDispatchCount() const {
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MESOSPHERE_ASSERT_THIS();
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MESOSPHERE_ASSERT_THIS();
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return this->GetStackParameters().disable_count;
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return this->GetStackParameters().disable_count;
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}
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}
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@ -0,0 +1,26 @@
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/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#ifdef ATMOSPHERE_ARCH_ARM64
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#include <mesosphere/arch/arm64/kern_assembly_offsets.h>
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#else
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#error "Unknown architecture for CPU"
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#endif
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@ -20,7 +20,7 @@
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namespace ams::kern::svc {
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namespace ams::kern::svc {
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static constexpr size_t NumSupervisorCalls = 0x80;
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static constexpr size_t NumSupervisorCalls = 0xC0;
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#define AMS_KERN_SVC_DECLARE_ENUM_ID(ID, RETURN_TYPE, NAME, ...) \
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#define AMS_KERN_SVC_DECLARE_ENUM_ID(ID, RETURN_TYPE, NAME, ...) \
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SvcId_##NAME = ID,
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SvcId_##NAME = ID,
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@ -13,6 +13,7 @@
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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#include <mesosphere/kern_select_assembly_offsets.h>
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/* ams::kern::svc::CallReturnFromException64(Result result) */
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/* ams::kern::svc::CallReturnFromException64(Result result) */
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.section .text._ZN3ams4kern3svc25CallReturnFromException64Ev, "ax", %progbits
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.section .text._ZN3ams4kern3svc25CallReturnFromException64Ev, "ax", %progbits
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@ -62,7 +63,7 @@ _ZN3ams4kern3svc14RestoreContextEm:
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0: /* We should handle DPC. */
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0: /* We should handle DPC. */
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/* Check the dpc flags. */
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/* Check the dpc flags. */
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ldrb w8, [sp, #(0x120 + 0x10)]
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ldrb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
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cbz w8, 1f
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cbz w8, 1f
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/* We have DPC to do! */
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/* We have DPC to do! */
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@ -82,7 +83,7 @@ _ZN3ams4kern3svc14RestoreContextEm:
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1: /* We're done with DPC, and should return from the svc. */
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1: /* We're done with DPC, and should return from the svc. */
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/* Clear our in-SVC note. */
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/* Clear our in-SVC note. */
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strb wzr, [sp, #(0x120 + 0x12)]
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strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
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/* Restore registers. */
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/* Restore registers. */
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ldp x30, x8, [sp, #(8 * 30)]
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ldp x30, x8, [sp, #(8 * 30)]
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@ -14,6 +14,7 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#include <mesosphere/kern_build_config.hpp>
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#include <mesosphere/kern_build_config.hpp>
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#include <mesosphere/kern_select_assembly_offsets.h>
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/* ams::kern::arch::arm64::SvcHandler64() */
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/* ams::kern::arch::arm64::SvcHandler64() */
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.section .text._ZN3ams4kern4arch5arm6412SvcHandler64Ev, "ax", %progbits
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.section .text._ZN3ams4kern4arch5arm6412SvcHandler64Ev, "ax", %progbits
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@ -32,7 +33,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
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mrs x9, elr_el1
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mrs x9, elr_el1
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mrs x10, spsr_el1
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mrs x10, spsr_el1
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mrs x11, tpidr_el0
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mrs x11, tpidr_el0
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ldr x18, [sp, #(0x120 + 0x28)]
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ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
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/* Save callee-saved registers. */
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/* Save callee-saved registers. */
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stp x19, x20, [sp, #(8 * 19)]
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stp x19, x20, [sp, #(8 * 19)]
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@ -59,7 +60,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
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/* Check the specific SVC permission bit for allowal. */
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/* Check the specific SVC permission bit for allowal. */
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mov x9, sp
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mov x9, sp
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add x9, x9, x8, lsr#3
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add x9, x9, x8, lsr#3
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ldrb w9, [x9, #0x120]
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ldrb w9, [x9, #(0x120 + THREAD_STACK_PARAMETERS_SVC_PERMISSION)]
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and x10, x8, #0x7
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and x10, x8, #0x7
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lsr x10, x9, x10
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lsr x10, x9, x10
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tst x10, #1
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tst x10, #1
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@ -71,7 +72,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
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cbz w10, 1f
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cbz w10, 1f
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/* It might not, so check the stack params to see if we must not allow the SVC. */
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/* It might not, so check the stack params to see if we must not allow the SVC. */
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ldrb w10, [sp, #(0x120 + 0x14)]
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ldrb w10, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_PINNED)]
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cbz w10, 3f
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cbz w10, 3f
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1: /* We can call the SVC. */
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1: /* We can call the SVC. */
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@ -81,8 +82,8 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
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/* Note that we're calling the SVC. */
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/* Note that we're calling the SVC. */
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mov w10, #1
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mov w10, #1
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strb w10, [sp, #(0x120 + 0x12)]
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strb w10, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
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strb w8, [sp, #(0x120 + 0x11)]
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strb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CURRENT_SVC_ID)]
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/* If we should, trace the svc entry. */
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/* If we should, trace the svc entry. */
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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@ -109,7 +110,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
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2: /* We completed the SVC, and we should handle DPC. */
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2: /* We completed the SVC, and we should handle DPC. */
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/* Check the dpc flags. */
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/* Check the dpc flags. */
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ldrb w8, [sp, #(0x120 + 0x10)]
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ldrb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
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cbz w8, 4f
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cbz w8, 4f
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/* We have DPC to do! */
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/* We have DPC to do! */
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@ -179,7 +180,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
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4: /* Return from SVC. */
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4: /* Return from SVC. */
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/* Clear our in-SVC note. */
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/* Clear our in-SVC note. */
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strb wzr, [sp, #(0x120 + 0x12)]
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strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
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/* If we should, trace the svc exit. */
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/* If we should, trace the svc exit. */
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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@ -245,7 +246,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
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mrs x17, elr_el1
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mrs x17, elr_el1
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mrs x20, spsr_el1
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mrs x20, spsr_el1
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mrs x19, tpidr_el0
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mrs x19, tpidr_el0
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ldr x18, [sp, #(0x120 + 0x28)]
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ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
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stp x17, x20, [sp, #(8 * 32)]
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stp x17, x20, [sp, #(8 * 32)]
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str x19, [sp, #(8 * 34)]
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str x19, [sp, #(8 * 34)]
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@ -268,7 +269,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
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/* Check the specific SVC permission bit for allowal. */
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/* Check the specific SVC permission bit for allowal. */
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mov x20, sp
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mov x20, sp
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add x20, x20, x16, lsr#3
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add x20, x20, x16, lsr#3
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ldrb w20, [x20, #0x120]
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ldrb w20, [x20, #(0x120 + THREAD_STACK_PARAMETERS_SVC_PERMISSION)]
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and x17, x16, #0x7
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and x17, x16, #0x7
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lsr x17, x20, x17
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lsr x17, x20, x17
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tst x17, #1
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tst x17, #1
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@ -280,7 +281,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
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cbz w15, 1f
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cbz w15, 1f
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/* It might not, so check the stack params to see if we must not allow the SVC. */
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/* It might not, so check the stack params to see if we must not allow the SVC. */
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ldrb w15, [sp, #(0x120 + 0x14)]
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ldrb w15, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_PINNED)]
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cbz w15, 3f
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cbz w15, 3f
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1: /* We can call the SVC. */
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1: /* We can call the SVC. */
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@ -290,8 +291,8 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
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/* Note that we're calling the SVC. */
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/* Note that we're calling the SVC. */
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mov w15, #1
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mov w15, #1
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strb w15, [sp, #(0x120 + 0x12)]
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strb w15, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
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strb w16, [sp, #(0x120 + 0x11)]
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strb w16, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CURRENT_SVC_ID)]
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/* If we should, trace the svc entry. */
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/* If we should, trace the svc entry. */
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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@ -318,7 +319,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
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2: /* We completed the SVC, and we should handle DPC. */
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2: /* We completed the SVC, and we should handle DPC. */
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/* Check the dpc flags. */
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/* Check the dpc flags. */
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ldrb w16, [sp, #(0x120 + 0x10)]
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ldrb w16, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
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cbz w16, 4f
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cbz w16, 4f
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/* We have DPC to do! */
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/* We have DPC to do! */
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@ -376,7 +377,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
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4: /* Return from SVC. */
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4: /* Return from SVC. */
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/* Clear our in-SVC note. */
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/* Clear our in-SVC note. */
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strb wzr, [sp, #(0x120 + 0x12)]
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strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
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/* If we should, trace the svc exit. */
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/* If we should, trace the svc exit. */
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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#if defined(MESOSPHERE_BUILD_FOR_TRACING)
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