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kern: bump svc limit to 192 from 128

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This commit is contained in:
Michael Scire 2021-04-06 22:26:52 -07:00
parent b92376192c
commit af72072313
7 changed files with 89 additions and 22 deletions
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27
libmesosphere/include/mesosphere/arch/arm64/kern_assembly_offsets.h Normal file
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@ -0,0 +1,27 @@
/*
* Copyright (c) 2018-2020 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#define THREAD_STACK_PARAMETERS_SIZE 0x30
#define THREAD_STACK_PARAMETERS_SVC_PERMISSION 0x00
#define THREAD_STACK_PARAMETERS_CONTEXT 0x18
#define THREAD_STACK_PARAMETERS_CUR_THREAD 0x20
#define THREAD_STACK_PARAMETERS_DISABLE_COUNT 0x28
#define THREAD_STACK_PARAMETERS_DPC_FLAGS 0x2A
#define THREAD_STACK_PARAMETERS_CURRENT_SVC_ID 0x2B
#define THREAD_STACK_PARAMETERS_IS_CALLING_SVC 0x2C
#define THREAD_STACK_PARAMETERS_IS_IN_EXCEPTION_HANDLER 0x2D
#define THREAD_STACK_PARAMETERS_IS_PINNED 0x2E

1
libmesosphere/include/mesosphere/kern_common.hpp
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@ -17,6 +17,7 @@
#include <vapours.hpp>
#include <mesosphere/kern_build_config.hpp>
#include <mesosphere/svc/kern_svc_results.hpp>
#include <mesosphere/kern_select_assembly_offsets.h>
namespace ams::kern {

21
libmesosphere/include/mesosphere/kern_k_thread.hpp
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@ -82,17 +82,28 @@ namespace ams::kern {
};
struct StackParameters {
alignas(0x10) u8 svc_permission[0x10];
alignas(0x10) u8 svc_permission[0x18];
KThreadContext *context;
KThread *cur_thread;
s16 disable_count;
std::atomic<u8> dpc_flags;
u8 current_svc_id;
bool is_calling_svc;
bool is_in_exception_handler;
bool is_pinned;
s32 disable_count;
KThreadContext *context;
KThread *cur_thread;
};
static_assert(alignof(StackParameters) == 0x10);
static_assert(sizeof(StackParameters) == THREAD_STACK_PARAMETERS_SIZE);
static_assert(__builtin_offsetof(StackParameters, svc_permission) == THREAD_STACK_PARAMETERS_SVC_PERMISSION);
static_assert(__builtin_offsetof(StackParameters, context) == THREAD_STACK_PARAMETERS_CONTEXT);
static_assert(__builtin_offsetof(StackParameters, cur_thread) == THREAD_STACK_PARAMETERS_CUR_THREAD);
static_assert(__builtin_offsetof(StackParameters, disable_count) == THREAD_STACK_PARAMETERS_DISABLE_COUNT);
static_assert(__builtin_offsetof(StackParameters, dpc_flags) == THREAD_STACK_PARAMETERS_DPC_FLAGS);
static_assert(__builtin_offsetof(StackParameters, current_svc_id) == THREAD_STACK_PARAMETERS_CURRENT_SVC_ID);
static_assert(__builtin_offsetof(StackParameters, is_calling_svc) == THREAD_STACK_PARAMETERS_IS_CALLING_SVC);
static_assert(__builtin_offsetof(StackParameters, is_in_exception_handler) == THREAD_STACK_PARAMETERS_IS_IN_EXCEPTION_HANDLER);
static_assert(__builtin_offsetof(StackParameters, is_pinned) == THREAD_STACK_PARAMETERS_IS_PINNED);
struct QueueEntry {
private:
@ -251,7 +262,7 @@ namespace ams::kern {
return *(reinterpret_cast<StackParameters *>(m_kernel_stack_top) - 1);
}
public:
ALWAYS_INLINE s32 GetDisableDispatchCount() const {
ALWAYS_INLINE s16 GetDisableDispatchCount() const {
MESOSPHERE_ASSERT_THIS();
return this->GetStackParameters().disable_count;
}

26
libmesosphere/include/mesosphere/kern_select_assembly_offsets.h Normal file
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@ -0,0 +1,26 @@
/*
* Copyright (c) 2018-2020 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#ifdef ATMOSPHERE_ARCH_ARM64
#include <mesosphere/arch/arm64/kern_assembly_offsets.h>
#else
#error "Unknown architecture for CPU"
#endif

2
libmesosphere/include/mesosphere/svc/kern_svc_prototypes.hpp
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@ -20,7 +20,7 @@
namespace ams::kern::svc {
static constexpr size_t NumSupervisorCalls = 0x80;
static constexpr size_t NumSupervisorCalls = 0xC0;
#define AMS_KERN_SVC_DECLARE_ENUM_ID(ID, RETURN_TYPE, NAME, ...) \
SvcId_##NAME = ID,

5
libmesosphere/source/arch/arm64/svc/kern_svc_exception_asm.s
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@ -13,6 +13,7 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <mesosphere/kern_select_assembly_offsets.h>
/* ams::kern::svc::CallReturnFromException64(Result result) */
.section .text._ZN3ams4kern3svc25CallReturnFromException64Ev, "ax", %progbits
@ -62,7 +63,7 @@ _ZN3ams4kern3svc14RestoreContextEm:
0: /* We should handle DPC. */
/* Check the dpc flags. */
ldrb w8, [sp, #(0x120 + 0x10)]
ldrb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
cbz w8, 1f
/* We have DPC to do! */
@ -82,7 +83,7 @@ _ZN3ams4kern3svc14RestoreContextEm:
1: /* We're done with DPC, and should return from the svc. */
/* Clear our in-SVC note. */
strb wzr, [sp, #(0x120 + 0x12)]
strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
/* Restore registers. */
ldp x30, x8, [sp, #(8 * 30)]

29
libmesosphere/source/arch/arm64/svc/kern_svc_handlers_asm.s
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@ -14,6 +14,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <mesosphere/kern_build_config.hpp>
#include <mesosphere/kern_select_assembly_offsets.h>
/* ams::kern::arch::arm64::SvcHandler64() */
.section .text._ZN3ams4kern4arch5arm6412SvcHandler64Ev, "ax", %progbits
@ -32,7 +33,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
mrs x9, elr_el1
mrs x10, spsr_el1
mrs x11, tpidr_el0
ldr x18, [sp, #(0x120 + 0x28)]
ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
/* Save callee-saved registers. */
stp x19, x20, [sp, #(8 * 19)]
@ -59,7 +60,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
/* Check the specific SVC permission bit for allowal. */
mov x9, sp
add x9, x9, x8, lsr#3
ldrb w9, [x9, #0x120]
ldrb w9, [x9, #(0x120 + THREAD_STACK_PARAMETERS_SVC_PERMISSION)]
and x10, x8, #0x7
lsr x10, x9, x10
tst x10, #1
@ -71,7 +72,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
cbz w10, 1f
/* It might not, so check the stack params to see if we must not allow the SVC. */
ldrb w10, [sp, #(0x120 + 0x14)]
ldrb w10, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_PINNED)]
cbz w10, 3f
1: /* We can call the SVC. */
@ -81,8 +82,8 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
/* Note that we're calling the SVC. */
mov w10, #1
strb w10, [sp, #(0x120 + 0x12)]
strb w8, [sp, #(0x120 + 0x11)]
strb w10, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
strb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CURRENT_SVC_ID)]
/* If we should, trace the svc entry. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING)
@ -109,7 +110,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
2: /* We completed the SVC, and we should handle DPC. */
/* Check the dpc flags. */
ldrb w8, [sp, #(0x120 + 0x10)]
ldrb w8, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
cbz w8, 4f
/* We have DPC to do! */
@ -179,7 +180,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler64Ev:
4: /* Return from SVC. */
/* Clear our in-SVC note. */
strb wzr, [sp, #(0x120 + 0x12)]
strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
/* If we should, trace the svc exit. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING)
@ -245,7 +246,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
mrs x17, elr_el1
mrs x20, spsr_el1
mrs x19, tpidr_el0
ldr x18, [sp, #(0x120 + 0x28)]
ldr x18, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CUR_THREAD)]
stp x17, x20, [sp, #(8 * 32)]
str x19, [sp, #(8 * 34)]
@ -268,7 +269,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
/* Check the specific SVC permission bit for allowal. */
mov x20, sp
add x20, x20, x16, lsr#3
ldrb w20, [x20, #0x120]
ldrb w20, [x20, #(0x120 + THREAD_STACK_PARAMETERS_SVC_PERMISSION)]
and x17, x16, #0x7
lsr x17, x20, x17
tst x17, #1
@ -280,7 +281,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
cbz w15, 1f
/* It might not, so check the stack params to see if we must not allow the SVC. */
ldrb w15, [sp, #(0x120 + 0x14)]
ldrb w15, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_PINNED)]
cbz w15, 3f
1: /* We can call the SVC. */
@ -290,8 +291,8 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
/* Note that we're calling the SVC. */
mov w15, #1
strb w15, [sp, #(0x120 + 0x12)]
strb w16, [sp, #(0x120 + 0x11)]
strb w15, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
strb w16, [sp, #(0x120 + THREAD_STACK_PARAMETERS_CURRENT_SVC_ID)]
/* If we should, trace the svc entry. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING)
@ -318,7 +319,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
2: /* We completed the SVC, and we should handle DPC. */
/* Check the dpc flags. */
ldrb w16, [sp, #(0x120 + 0x10)]
ldrb w16, [sp, #(0x120 + THREAD_STACK_PARAMETERS_DPC_FLAGS)]
cbz w16, 4f
/* We have DPC to do! */
@ -376,7 +377,7 @@ _ZN3ams4kern4arch5arm6412SvcHandler32Ev:
4: /* Return from SVC. */
/* Clear our in-SVC note. */
strb wzr, [sp, #(0x120 + 0x12)]
strb wzr, [sp, #(0x120 + THREAD_STACK_PARAMETERS_IS_CALLING_SVC)]
/* If we should, trace the svc exit. */
#if defined(MESOSPHERE_BUILD_FOR_TRACING)